Re: [PATCH 16/20] selftest/powerpc/pmu/: Add selftest for mmcr1 pmcxsel/unit/cache fields

On 3/10/22 17:41, Michael Ellerman wrote: > Christophe Leroy writes: >> Le 27/01/2022 à 08:20, Kajol Jain a écrit : >>> From: Athira Rajeev >>> >>> The testcase uses event code "0x134001c040" to verify >>> the settings for different fields in Monitor Mode Control >>> Register 1 (MMCR1).

Re: [PATCH 16/20] selftest/powerpc/pmu/: Add selftest for mmcr1 pmcxsel/unit/cache fields

Christophe Leroy writes: > Le 27/01/2022 à 08:20, Kajol Jain a écrit : >> From: Athira Rajeev >> >> The testcase uses event code "0x134001c040" to verify >> the settings for different fields in Monitor Mode Control >> Register 1 (MMCR1). The fields include PMCxSEL, PMCXCOMB >> PMCxUNIT,

Re: [PATCH 16/20] selftest/powerpc/pmu/: Add selftest for mmcr1 pmcxsel/unit/cache fields

Le 27/01/2022 à 08:20, Kajol Jain a écrit : > From: Athira Rajeev > > The testcase uses event code "0x134001c040" to verify > the settings for different fields in Monitor Mode Control > Register 1 (MMCR1). The fields include PMCxSEL, PMCXCOMB > PMCxUNIT, cache. Checks if these fields are

[PATCH 16/20] selftest/powerpc/pmu/: Add selftest for mmcr1 pmcxsel/unit/cache fields

From: Athira Rajeev The testcase uses event code "0x134001c040" to verify the settings for different fields in Monitor Mode Control Register 1 (MMCR1). The fields include PMCxSEL, PMCXCOMB PMCxUNIT, cache. Checks if these fields are translated correctly via perf interface to MMCR1