Re: [Mesa-dev] [PATCH] ac/nir: mark some texture intrinsics as convergent

On Thu, May 30, 2019, 7:08 PM Bas Nieuwenhuizen wrote: > > > On Fri, May 31, 2019, 12:49 AM Marek Olšák wrote: > >> >> >> On Thu, May 30, 2019, 6:44 PM Bas Nieuwenhuizen >> wrote: >> >>> >>> >>> On Thu, May 30, 2019, 11:45 PM Marek Olšák wrote: >>> On Thu, May 30, 2019, 3:54 PM

Re: [Mesa-dev] [PATCH] ac/nir: mark some texture intrinsics as convergent

On Fri, May 31, 2019, 12:49 AM Marek Olšák wrote: > > > On Thu, May 30, 2019, 6:44 PM Bas Nieuwenhuizen > wrote: > >> >> >> On Thu, May 30, 2019, 11:45 PM Marek Olšák wrote: >> >>> >>> >>> On Thu, May 30, 2019, 3:54 PM Rhys Perry >>> wrote: >>> Otherwise LLVM can sink them and their

Re: [Mesa-dev] [PATCH] ac/nir: mark some texture intrinsics as convergent

On Thu, May 30, 2019, 6:44 PM Bas Nieuwenhuizen wrote: > > > On Thu, May 30, 2019, 11:45 PM Marek Olšák wrote: > >> >> >> On Thu, May 30, 2019, 3:54 PM Rhys Perry >> wrote: >> >>> Otherwise LLVM can sink them and their texture coordinate calculations >>> into divergent branches. >>> >>> v2:

Re: [Mesa-dev] [PATCH] ac/nir: mark some texture intrinsics as convergent

On Thu, May 30, 2019, 11:45 PM Marek Olšák wrote: > > > On Thu, May 30, 2019, 3:54 PM Rhys Perry wrote: > >> Otherwise LLVM can sink them and their texture coordinate calculations >> into divergent branches. >> >> v2: simplify the conditions on which the intrinsic is marked as convergent >> >>

[Mesa-dev] [PATCH] freedreno: Fix GCC build error.

../src/freedreno/vulkan/tu_device.c:900:4: error: initializer element is not constant .minImageTransferGranularity = (VkExtent3D) { 1, 1, 1 }, ^ Suggested-by: Kristian Høgsberg Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110698 Signed-off-by: Vinson Lee ---

Re: [Mesa-dev] [PATCH 8/8] egl: add EGL_platform_device support

Hi Emil, What are your plans for pushing this? Thanks, Marek On Thu, May 16, 2019, 3:23 PM Marek Olšák wrote: > Acked-by: Marek Olšák > > Marek > > On Thu, May 16, 2019 at 1:03 PM Emil Velikov > wrote: > >> This new 'platform' is added by default with no guards. >> >> It is effectively a

Re: [Mesa-dev] [PATCH] ac/nir: mark some texture intrinsics as convergent

On Thu, May 30, 2019, 3:54 PM Rhys Perry wrote: > Otherwise LLVM can sink them and their texture coordinate calculations > into divergent branches. > > v2: simplify the conditions on which the intrinsic is marked as convergent > > Cc: > Signed-off-by: Rhys Perry > Reviewed-By: Bas

Re: [Mesa-dev] [PATCH v3 03/18] intel/blorp: Use the hardware op for CCS ambiguate on gen10+

Thanks. Landed. On Thu, May 30, 2019 at 7:02 AM Jason Ekstrand wrote: > > Feel free to land > > On Wed, May 29, 2019 at 4:50 PM Nanley Chery wrote: >> >> On Wed, Feb 14, 2018 at 12:19 PM Jason Ekstrand wrote: >> > >> > Cannonlake hardware adds a new resolve type in 3DSTATE_PS called >> >

[Mesa-dev] [PATCH] ac/nir: mark some texture intrinsics as convergent

Otherwise LLVM can sink them and their texture coordinate calculations into divergent branches. v2: simplify the conditions on which the intrinsic is marked as convergent Cc: Signed-off-by: Rhys Perry Reviewed-By: Bas Nieuwenhuizen --- src/amd/common/ac_nir_to_llvm.c | 12 1

Re: [Mesa-dev] [PATCH] ac/nir: mark some texture intrinsics as convergent

It doesn't matter if the opcode supplies a lod. The only thing that matters is if the opcode computes derivatives. It seems that the only opcodes computing derivatives are tex, tex_bias, and query_lod. This only applies to fragment shaders. Other stages never compute derivatives. There is an NV

Re: [Mesa-dev] [PATCH] ac/nir: mark some texture intrinsics as convergent

Seems txf can(should?) have a lod supplied. txf_ms and tg4 always use the 0th level. I'll add txf, txf_ms and tg4 to the list of nir_texop which don't ever have implicit derivatives. On Thu, 30 May 2019 at 19:43, Ilia Mirkin wrote: > > txf supplies an lod, but tg4's is implicitly always 0. > >

Re: [Mesa-dev] [PATCH] ac/nir: mark some texture intrinsics as convergent

txf supplies an lod, but tg4's is implicitly always 0. On Thu, May 30, 2019 at 2:26 PM Bas Nieuwenhuizen wrote: > > On Thu, May 30, 2019 at 6:50 PM Rhys Perry wrote: > > > > Otherwise LLVM can sink them and their texture coordinate calculations > > into divergent branches. > > > > Cc: > >

Re: [Mesa-dev] [PATCH] ac/nir: mark some texture intrinsics as convergent

On Thu, May 30, 2019 at 6:50 PM Rhys Perry wrote: > > Otherwise LLVM can sink them and their texture coordinate calculations > into divergent branches. > > Cc: > Signed-off-by: Rhys Perry > --- > src/amd/common/ac_nir_to_llvm.c | 29 + > 1 file changed, 29

Re: [Mesa-dev] [PATCH] radv: fix some compiler warnings

Or even better, cast it to uint32_t explicitly. On Thu, May 30, 2019 at 8:23 PM Bas Nieuwenhuizen wrote: > > maybe use UINT32_MAX? > > otherwise r-b > > On Thu, May 30, 2019 at 6:50 PM Rhys Perry wrote: > > > > Fixes -Woverflow warnings with GCC 9.1.1 > > > > Signed-off-by: Rhys Perry > > ---

Re: [Mesa-dev] [PATCH] radv: fix some compiler warnings

maybe use UINT32_MAX? otherwise r-b On Thu, May 30, 2019 at 6:50 PM Rhys Perry wrote: > > Fixes -Woverflow warnings with GCC 9.1.1 > > Signed-off-by: Rhys Perry > --- > src/amd/vulkan/si_cmd_buffer.c | 8 > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git

[Mesa-dev] [PATCH] ac/nir: mark some texture intrinsics as convergent

Otherwise LLVM can sink them and their texture coordinate calculations into divergent branches. Cc: Signed-off-by: Rhys Perry --- src/amd/common/ac_nir_to_llvm.c | 29 + 1 file changed, 29 insertions(+) diff --git a/src/amd/common/ac_nir_to_llvm.c

[Mesa-dev] [PATCH] radv: fix some compiler warnings

Fixes -Woverflow warnings with GCC 9.1.1 Signed-off-by: Rhys Perry --- src/amd/vulkan/si_cmd_buffer.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index aae8d578c10..d87c00b94e9 100644 ---

Re: [Mesa-dev] [PATCH 2/2] radv: use RADV_CMD_DRITY_DYNAMIC_* when restoring viewport/scissor

r-b for both if you fix the DRITY in the title of this one. On Thu, May 30, 2019 at 12:26 PM Samuel Pitoiset wrote: > > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_meta.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/src/amd/vulkan/radv_meta.c

[Mesa-dev] [Bug 110625] [TRACKER] Mesa 19.1 release tracker

https://bugs.freedesktop.org/show_bug.cgi?id=110625 Juan A. Suarez changed: What|Removed |Added CC||jasua...@igalia.com -- You are

[Mesa-dev] [Bug 110357] [REGRESSION] [BISECTED] [OpenGL CTS] cts-runner --type=gl46 fails in new attempted "41" configuration

https://bugs.freedesktop.org/show_bug.cgi?id=110357 Juan A. Suarez changed: What|Removed |Added CC||jasua...@igalia.com -- You are

[Mesa-dev] [PATCH 8/8] radv: enable VK_EXT_sample_locations

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 8 src/amd/vulkan/radv_extensions.py | 2 +- 2 files changed, 1 insertion(+), 9 deletions(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 3cf050ed220..16efc6134f1 100644 ---

Re: [Mesa-dev] [PATCH v3 03/18] intel/blorp: Use the hardware op for CCS ambiguate on gen10+

Feel free to land On Wed, May 29, 2019 at 4:50 PM Nanley Chery wrote: > On Wed, Feb 14, 2018 at 12:19 PM Jason Ekstrand > wrote: > > > > Cannonlake hardware adds a new resolve type in 3DSTATE_PS called > > FAST_CLEAR_0 which does an ambiguate. Now that the hardware can do it > > directly, we

[Mesa-dev] [PATCH 2/8] radv: allow to set dynamic sample locations to the depth decompress pass

If VK_EXT_sample_locations is used, the driver might need to emit the sample locations specified during layout transitions. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta_decompress.c | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git

[Mesa-dev] [PATCH 7/8] radv: enable HTILE for images that might need variable sample locations

This is now supported. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 7 --- 1 file changed, 7 deletions(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index b69dda39ce1..161997ae196 100644 --- a/src/amd/vulkan/radv_image.c +++

[Mesa-dev] [PATCH 6/8] radv: handle sample locations during automatic layout transitions

From the Vulkan spec 1.1.109: "Some implementations may need to evaluate depth image values while performing image layout transitions. To accommodate this, instances of the VkSampleLocationsInfoEXT structure can be specified for each situation where an explicit or automatic

[Mesa-dev] [PATCH 4/8] radv: handle sample locations during explicit depth/stencil transitions

From the Vulkan spec 1.1.109, "Some implementations may need to evaluate depth image values while performing image layout transitions. To accommodate this, instances of the VkSampleLocationsInfoEXT structure can be specified for each situation where an explicit or automatic

[Mesa-dev] [PATCH 0/8] radv: add support for sample locations during layout transitions

Hi, This series implements user sample locations during explicit and automatic (subpass) layout transitions as defined by VK_EXT_sample_locations. Previously, HTILE was disabled for depth/stencil images that might need sample locations because it was a bit tricky to implement. The last patch of

[Mesa-dev] [PATCH 5/8] radv: determine the first subpass id for every attachments

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_pass.c| 18 ++ src/amd/vulkan/radv_private.h | 3 ++- 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_pass.c b/src/amd/vulkan/radv_pass.c index 4d1e38a780e..8fa098eaac8 100644 ---

[Mesa-dev] [PATCH 1/8] radv: allow to save/restore sample locations during meta operations

This will be used for the depth decompress pass that might need to emit variable sample locations during layout transitions. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta.c | 20 src/amd/vulkan/radv_meta.h | 2 ++ 2 files changed, 22 insertions(+) diff --git

[Mesa-dev] [PATCH 3/8] radv: allow the depth decompress pass to emit dynamic sample locations

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 3 ++- src/amd/vulkan/radv_meta.h| 6 -- src/amd/vulkan/radv_meta_decompress.c | 29 +++ 3 files changed, 31 insertions(+), 7 deletions(-) diff --git

[Mesa-dev] [PATCH] radv: set the subpass before any initial subpass transitions

This might fix initial subpass transitions when multiview is used. Noticed while implementing sample locations during layout transitions. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git

Re: [Mesa-dev] [PATCH] radv: enable transformFeedbackStreamsLinesTriangles

r-b On Thu, May 30, 2019 at 10:05 AM Samuel Pitoiset wrote: > > The driver should already support this without any changes. > > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_device.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git

[Mesa-dev] [PATCH] d3dadapter9: Revert to old throttling limit value

Thanks Juan for warning me it didn't make it to mesa-dev. Here it is. Axel Forwarded Message Subject:[PATCH] d3dadapter9: Revert to old throttling limit value Date: Sun, 26 May 2019 23:23:59 +0200 From: Axel Davy CC: Axel Davy ,

[Mesa-dev] [PATCH 1/2] radv: use CmdPushConstants when restoring constants after meta operations

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_meta.c index ec4fc4a6d4b..721c7039830 100644 --- a/src/amd/vulkan/radv_meta.c +++

[Mesa-dev] [PATCH 2/2] radv: use RADV_CMD_DRITY_DYNAMIC_* when restoring viewport/scissor

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_meta.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_meta.c index 721c7039830..3bfe49b4dab 100644 --- a/src/amd/vulkan/radv_meta.c +++ b/src/amd/vulkan/radv_meta.c @@

[Mesa-dev] [PATCH] radv: enable transformFeedbackStreamsLinesTriangles

The driver should already support this without any changes. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index d04dcbed89e..16efc6134f1 100644 ---

Re: [Mesa-dev] Crash in iris_bufmgr.c

On Wednesday, May 29, 2019 10:30:45 PM PDT Mathias Fröhlich wrote: > Hi Kenneth, > > since your recent changes, I get a zero pointer dereference in > alloc_bo_from_cache on one workload here: > > What I get is > > Thread 2 "" received signal SIGSEGV, Segmentation fault. > [Switching to Thread