From: Geetha sowjanya
Upon receiving FLR IRQ for a RVU PF, teardown or cleanup
resources held by that PF_FUNC. This patch cleans up,
NIX LF
- Stop ingress/egress traffic
- Disable NPC MCAM entries being used.
- Free Tx scheduler queues
- Disable RQ/SQ/CQ HW contexts
NPA LF
- Disable
From: Tomasz Duszynski
This works by shadowing existing UCAST MCAM entry
with a new one additionally matching either NPC_LT_LB_CTAG
or NPC_LT_LB_STAG. For this to fully work one needs to
send properly configured NIX_VTAG_CFG message afterwards i.e with
strip and capture enabled and type set to
From: Sunil Goutham
For a PF/VF with a NIXLF attached has default/reserved MCAM entries
for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be
forwarded to NIXLF only after it's contexts are initialized. This
patch keeps these default entries disabled and adds mbox messages
for a
From: Sunil Goutham
Added support to handle FLR for AF's VFs (i.e LBK VFs).
Just the FLR interrupt enable/disable, handler registration
etc, actual HW resource cleanup or LFs teardown logic is
already there.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c |
From: Sunil Goutham
While mapping a NIX LF to a NPA LF attached PF_FUNC or
SSO LF attached PF_FUNC, verify if PF_FUNC is valid and
if that PF_FUNC has a LF of that block attached to it or not.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 2 ++
From: Linu Cherian
- Add interrupt handlers for Master Enable events from PFs
and Master Enable events from VFs of AF
- Master Enable is required for the MSIX delivery to work
- Master Enable bit trap handler doesn't have to do any anything
other than clearing the TRPEND bit, since the
From: Tomasz Duszynski
Configure AF VFs such that they are able to talk over consecutive
loopback channels.
If 8 VFs are attached to AF then communication will work as below:
TX RX
lbk0 -> lbk1
lbk1 -> lbk0
lbk2 -> lbk3
lbk3 -> lbk2
lbk4 -> lbk5
lbk5 -> lbk4
lbk6 -> lbk7
lbk7 -> lbk6
From: Tomasz Duszynski
Enable all AF VFs during probe. Since AF's VFs work in pairs
(eg: Pkts sent on VF0 are received by VF1 and viceversa),
enable only even number of VFs out of totalVFs, which should
again be less than number of loopback (LBK) channels.
Also enable VF's mailbox interrupts.
From: Geetha sowjanya
RVU admin function (AF) has all the priviliges to cleanup
HW state when VFIO triggers a PCIe function level reset (FLR)
due to either reset or a VM crash. FLR for RVU PF1-PFn will
trigger an IRQ to AF.
This patch enables all RVU PF's FLR interrupts and registers a
handler.
From: Tomasz Duszynski
VFs attached to PFs other than AF can not communicate with AF
directly. Instead they are supposed to first send message to
the PF they are residing on and PF forwards it to the AF.
Responses to messages are handled in the reverse order.
On the other hand if VFs are on AF
From: Sunil Goutham
Errata 35038
Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets
the RX data path before configuration changes (e.g. disabling one or
more RQs). Hardware clears [ENA] to indicate sync is done
An issue exists whereby NIX may clear NIX_AF_RX_SW_SYNC
From: Santosh Shukla
Added basic default MKEX profile. This profile tells
hardware what data to extract from packet and where to
place it (bit offset) in final KEY generated for the
parsed packet. Based on the bit placement of the packet
data, MCAM entries have to programmed for matching.
Also
From: Sunil Goutham
A new mailbox message is added to support allocating a MCAM entry
along with a counter and configuring it in one go. This reduces
the amount of mailbox communication involved in installing a new
MCAM rule.
Signed-off-by: Sunil Goutham
---
From: Sunil Goutham
This patch adds support for RVU PF/VFs to modify min/max
packet lengths allowed by HW. For VFs on PF0, settings will
be automatically applied on LBK link. RX link's min/maxlen
is configured to min/max of PF and it's all VFs. On the TX side
if requested all SMQs attached to
From: Sunil Goutham
This patch converts all mailbox message handler API
names to lowercase.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.c | 2 +-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 73 --
From: Sunil Goutham
Add support for a RVU PF/VF to enable, disable, configure
and shuffle MCAM entries via mbox commands. This patch adds
mailbox message formats and handling of these commands.
As of now otherthan validating MCAM entry index, info like
channel number e.t.c in MCAM config data
From: Kiran Kumar
This patch adds reading HW limits like number of Rx/Tx stats,
number of queue IRQs supported per NIX LF from AF registers
and sync them to PF/VF.
Signed-off-by: Kiran Kumar
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h| 4
From: Sunil Goutham
This patch adds NPC MCAM entry management and support for
allocating and freeing them via mailbox. Both contiguous and
non-contiguous allocations are supported. Incase of contiguous,
if request cannot be met then max contiguous number of available
entries are allocated.
High
From: Sunil Goutham
NPC HW has counters which can be mapped to MCAM
entries to gather entry match statistics. This
patch adds support to allocate, free, clear and retrieve
stats of NPC MCAM counters. New mailbox messages have
been added for this. Similar to MCAM entries both
contiguous and
From: Sunil Goutham
Alloc memory to save MCAM 'entry to counter' mapping and since
multiple entries can map to same counter, added counter's reference
count tracking.
Do 'entry to counter' mapping when a entry is being installed
and mbox msg sender requested to configure a counter as well.
From: Stanislaw Kardach
Mailbox message handling is done in a workqueue context scheduled
from interrupt handler. So resource locks does not need to be a spinlock.
Therefore relax them into a mutex so that later on we may use them
in routines that might sleep.
Signed-off-by: Stanislaw Kardach
From: Sunil Goutham
This patchset is a continuation to earlier submitted three patch
series to add a new driver for Marvell's OcteonTX2 SOC's
Resource virtualization unit (RVU) admin function driver.
1. octeontx2-af: Add RVU Admin Function driver
On Sat, Nov 17, 2018 at 12:50 PM David Miller wrote:
>
> From: sunil.kovv...@gmail.com
> Date: Thu, 15 Nov 2018 16:29:29 +0530
>
> > From: Stanislaw Kardach
> >
> > The resource locks does not need to be a spinlock as they are not
> > used in any interrupt handling routines (only in bottom
From: Tomasz Duszynski
Enable all AF VFs during probe. Since AF's VFs work in pairs
(eg: Pkts sent on VF0 are received by VF1 and viceversa),
enable only even number of VFs out of totalVFs, which should
again be less than number of loopback (LBK) channels.
Also enable VF's mailbox interrupts.
From: Linu Cherian
- Add interrupt handlers for Master Enable events from PFs
and Master Enable events from VFs of AF
- Master Enable is required for the MSIX delivery to work
- Master Enable bit trap handler doesn't have to do any anything
other than clearing the TRPEND bit, since the
From: Sunil Goutham
Errata 35038
Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets
the RX data path before configuration changes (e.g. disabling one or
more RQs). Hardware clears [ENA] to indicate sync is done
An issue exists whereby NIX may clear NIX_AF_RX_SW_SYNC
From: Geetha sowjanya
Upon receiving FLR IRQ for a RVU PF, teardown or cleanup
resources held by that PF_FUNC. This patch cleans up,
NIX LF
- Stop ingress/egress traffic
- Disable NPC MCAM entries being used.
- Free Tx scheduler queues
- Disable RQ/SQ/CQ HW contexts
NPA LF
- Disable
From: Tomasz Duszynski
VFs attached to PFs other than AF can not communicate with AF
directly. Instead they are supposed to first send message to
the PF they are residing on and PF forwards it to the AF.
Responses to messages are handled in the reverse order.
On the other hand if VFs are on AF
From: Sunil Goutham
Added support to handle FLR for AF's VFs (i.e LBK VFs).
Just the FLR interrupt enable/disable, handler registration
etc, actual HW resource cleanup or LFs teardown logic is
already there.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c |
From: Sunil Goutham
NPC HW has counters which can be mapped to MCAM
entries to gather entry match statistics. This
patch adds support to allocate, free, clear and retrieve
stats of NPC MCAM counters. New mailbox messages have
been added for this. Similar to MCAM entries both
contiguous and
From: Tomasz Duszynski
This works by shadowing existing UCAST MCAM entry
with a new one additionally matching either NPC_LT_LB_CTAG
or NPC_LT_LB_STAG. For this to fully work one needs to
send properly configured NIX_VTAG_CFG message afterwards i.e with
strip and capture enabled and type set to
From: Tomasz Duszynski
Configure AF VFs such that they are able to talk over consecutive
loopback channels.
If 8 VFs are attached to AF then communication will work as below:
TX RX
lbk0 -> lbk1
lbk1 -> lbk0
lbk2 -> lbk3
lbk3 -> lbk2
lbk4 -> lbk5
lbk5 -> lbk4
lbk6 -> lbk7
lbk7 -> lbk6
From: Sunil Goutham
A new mailbox message is added to support allocating a MCAM entry
along with a counter and configuring it in one go. This reduces
the amount of mailbox communication involved in installing a new
MCAM rule.
Signed-off-by: Sunil Goutham
---
From: Santosh Shukla
Added basic default MKEX profile. This profile tells
hardware what data to extract from packet and where to
place it (bit offset) in final KEY generated for the
parsed packet. Based on the bit placement of the packet
data, MCAM entries have to programmed for matching.
Also
From: Geetha sowjanya
RVU admin function (AF) has all the priviliges to cleanup
HW state when VFIO triggers a PCIe function level reset (FLR)
due to either reset or a VM crash. FLR for RVU PF1-PFn will
trigger an IRQ to AF.
This patch enables all RVU PF's FLR interrupts and registers a
handler.
From: Sunil Goutham
While mapping a NIX LF to a NPA LF attached PF_FUNC or
SSO LF attached PF_FUNC, verify if PF_FUNC is valid and
if that PF_FUNC has a LF of that block attached to it or not.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 2 ++
From: Sunil Goutham
Alloc memory to save MCAM 'entry to counter' mapping and since
multiple entries can map to same counter, added counter's reference
count tracking.
Do 'entry to counter' mapping when a entry is being installed
and mbox msg sender requested to configure a counter as well.
From: Sunil Goutham
For a PF/VF with a NIXLF attached has default/reserved MCAM entries
for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be
forwarded to NIXLF only after it's contexts are initialized. This
patch keeps these default entries disabled and adds mbox messages
for a
From: Stanislaw Kardach
The resource locks does not need to be a spinlock as they are not
used in any interrupt handling routines (only in bottom halves).
Therefore relax them into a mutex so that later on we may use them
in routines that might sleep.
Signed-off-by: Stanislaw Kardach
From: Kiran Kumar
This patch adds reading HW limits like number of Rx/Tx stats,
number of queue IRQs supported per NIX LF from AF registers
and sync them to PF/VF.
Signed-off-by: Kiran Kumar
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h| 4
From: Sunil Goutham
Add support for a RVU PF/VF to enable, disable, configure
and shuffle MCAM entries via mbox commands. This patch adds
mailbox message formats and handling of these commands.
As of now otherthan validating MCAM entry index, info like
channel number e.t.c in MCAM config data
From: Sunil Goutham
This patch adds NPC MCAM entry management and support for
allocating and freeing them via mailbox. Both contiguous and
non-contiguous allocations are supported. Incase of contiguous,
if request cannot be met then max contiguous number of available
entries are allocated.
High
From: Sunil Goutham
This patch converts all mailbox message handler API
names to lowercase.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.c | 2 +-
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 73 --
From: Sunil Goutham
This patchset is a continuation to earlier submitted three patch
series to add a new driver for Marvell's OcteonTX2 SOC's
Resource virtualization unit (RVU) admin function driver.
1. octeontx2-af: Add RVU Admin Function driver
From: Sunil Goutham
This patch adds support for RVU PF/VFs to modify min/max
packet lengths allowed by HW. For VFs on PF0, settings will
be automatically applied on LBK link. RX link's min/maxlen
is configured to min/max of PF and it's all VFs. On the TX side
if requested all SMQs attached to
On Sat, Nov 10, 2018 at 2:36 AM Arnd Bergmann wrote:
>
> On Fri, Nov 9, 2018 at 6:13 PM Sunil Kovvuri wrote:
> > On Fri, Nov 9, 2018 at 4:32 PM Arnd Bergmann wrote:
> > > On Fri, Nov 9, 2018 at 5:21 AM Sunil Kovvuri
> > > wrote:
>
> > >
> > >
On Fri, Nov 9, 2018 at 4:32 PM Arnd Bergmann wrote:
>
> On Fri, Nov 9, 2018 at 5:21 AM Sunil Kovvuri wrote:
> >
> > On Fri, Nov 9, 2018 at 2:13 AM Arnd Bergmann wrote:
> > >
> > > On Thu, Nov 8, 2018 at 7:37 PM wrote:
> > > > @@ -66
On Fri, Nov 9, 2018 at 4:42 PM Arnd Bergmann wrote:
>
> On Fri, Nov 9, 2018 at 5:29 AM Sunil Kovvuri wrote:
> > On Fri, Nov 9, 2018 at 2:17 AM Arnd Bergmann wrote:
> > > On Thu, Nov 8, 2018 at 7:37 PM wrote:
>
> > >
> > > Here is another insta
On Fri, Nov 9, 2018 at 2:32 AM Arnd Bergmann wrote:
>
> On Thu, Nov 8, 2018 at 7:36 PM wrote:
> >
> > From: Sunil Goutham
>
> Hmm, I noticed that you use a different address as the patch author
> and the submitter. I'm guessing that "Sunil Goutham"
On Fri, Nov 9, 2018 at 2:17 AM Arnd Bergmann wrote:
>
> On Thu, Nov 8, 2018 at 7:37 PM wrote:
>
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h
> > b/drivers/net/ethernet/marvell/octeontx2/af/npc.h
> > index f98b011..3f7e5e6 100644
> > ---
On Fri, Nov 9, 2018 at 2:13 AM Arnd Bergmann wrote:
>
> On Thu, Nov 8, 2018 at 7:37 PM wrote:
> > @@ -666,4 +668,20 @@ struct npc_mcam_unmap_counter_req {
> > u8 all; /* Unmap all entries using this counter ? */
> > };
> >
> > +struct npc_mcam_alloc_and_write_entry_req {
> > +
From: Tomasz Duszynski
Enable all AF VFs during probe. Since AF's VFs work in pairs
(eg: Pkts sent on VF0 are received by VF1 and viceversa),
enable only even number of VFs out of totalVFs, which should
again be less than number of loopback (LBK) channels.
Also enable VF's mailbox interrupts.
From: Tomasz Duszynski
VFs attached to PFs other than AF can not communicate with AF
directly. Instead they are supposed to first send message to
the PF they are residing on and PF forwards it to the AF.
Responses to messages are handled in the reverse order.
On the other hand if VFs are on AF
From: Tomasz Duszynski
Configure AF VFs such that they are able to talk over consecutive
loopback channels.
If 8 VFs are attached to AF then communication will work as below:
TX RX
lbk0 -> lbk1
lbk1 -> lbk0
lbk2 -> lbk3
lbk3 -> lbk2
lbk4 -> lbk5
lbk5 -> lbk4
lbk6 -> lbk7
lbk7 -> lbk6
From: Geetha sowjanya
Upon receiving FLR IRQ for a RVU PF, teardown or cleanup
resources held by that PF_FUNC. This patch cleans up,
NIX LF
- Stop ingress/egress traffic
- Disable NPC MCAM entries being used.
- Free Tx scheduler queues
- Disable RQ/SQ/CQ HW contexts
NPA LF
- Disable
From: Sunil Goutham
Added support to handle FLR for AF's VFs (i.e LBK VFs).
Just the FLR interrupt enable/disable, handler registration
etc, actual HW resource cleanup or LFs teardown logic is
already there.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/rvu.c |
From: Geetha sowjanya
All RVU PF's upon receiving a FLR will trigger an IRQ to RVU AF.
This patch enables all RVU PF's FLR interrupt and registers a
handler. Upon receiving an IRQ a workqueue is scheduled to
cleanup all RVU blocks being used by the PF/VF which received
the FLR.
Signed-off-by:
From: Sunil Goutham
Errata 35038
Software sets NIX_AF_RX_SW_SYNC[ENA] to sync (flush) in-flight packets
the RX data path before configuration changes (e.g. disabling one or
more RQs). Hardware clears [ENA] to indicate sync is done
An issue exists whereby NIX may clear NIX_AF_RX_SW_SYNC
From: Linu Cherian
- Add interrupt handlers for Master Enable events from PFs
and Master Enable events from VFs of AF
- Master Enable is required for the MSIX delivery to work
- Master Enable bit trap handler doesn't have to do any anything
other than clearing the TRPEND bit, since the
From: Sunil Goutham
NPC HW has counters which can be mapped to MCAM
entries to gather entry match statistics. This
patch adds support to allocate, free, clear and retrieve
stats of NPC MCAM counters. New mailbox messages have
been added for this. Similar to MCAM entries both
contiguous and
From: Sunil Goutham
While mapping a NIX LF to a NPA LF attached PF_FUNC or
SSO LF attached PF_FUNC, verify if PF_FUNC is valid and
if that PF_FUNC has a LF of that block attached to it or not.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 2 ++
From: Santosh Shukla
Added basic default MKEX profile. This profile tells
hardware what data to extract from packet and where to
place it (bit offset) in final KEY generated for the
parsed packet. Based on the bit placement of the packet
data, MCAM entries have to programmed for matching.
Also
From: Tomasz Duszynski
This works by shadowing existing UCAST MCAM entry
with a new one additionally matching either NPC_LT_LB_CTAG
or NPC_LT_LB_STAG. For this to fully work one needs to
send properly configured NIX_VTAG_CFG message afterwards i.e with
strip and capture enabled and type set to
From: Sunil Goutham
For a PF/VF with a NIXLF attached has default/reserved MCAM entries
for receiving Ucast/Bcast/Promisc traffic. Ideally traffic should be
forwarded to NIXLF only after it's contexts are initialized. This
patch keeps these default entries disabled and adds mbox messages
for a
From: Sunil Goutham
This patch adds NPC MCAM entry management and support for
allocating and freeing them via mailbox. Both contiguous and
non-contiguous allocations are supported. Incase of contiguous,
if request cannot be met then max contiguous number of available
entries are allocated.
High
From: Sunil Goutham
Alloc memory to save MCAM 'entry to counter' mapping and since
multiple entries can map to same counter, added counter's reference
count tracking.
Do 'entry to counter' mapping when a entry is being installed
and mbox msg sender requested to configure a counter as well.
From: Sunil Goutham
Add support for a RVU PF/VF to enable, disable, configure
and shuffle MCAM entries via mbox commands. This patch adds
mailbox message formats and handling of these commands.
As of now otherthan validating MCAM entry index, info like
channel number e.t.c in MCAM config data
From: Sunil Goutham
A new mailbox message is added to support allocating a MCAM entry
along with a counter and configuring it in one go. This reduces
the amount of mailbox communication involved in installing a new
MCAM rule.
Signed-off-by: Sunil Goutham
---
From: Stanislaw Kardach
The resource locks does not need to be a spinlock as they are not
used in any interrupt handling routines (only in bottom halves).
Therefore relax them into a mutex so that later on we may use them
in routines that might sleep.
Signed-off-by: Stanislaw Kardach
From: Sunil Goutham
This patch adds support for RVU PF/VFs to modify min/max
packet lengths allowed by HW. For VFs on PF0, settings will
be automatically applied on LBK link. RX link's min/maxlen
is configured to min/max of PF and it's all VFs. On the TX side
if requested all SMQs attached to
From: Kiran Kumar
This patch adds reading HW limits like number of Rx/Tx stats,
number of queue IRQs supported per NIX LF from AF registers
and sync them to PF/VF.
Signed-off-by: Kiran Kumar
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h| 4
From: Sunil Goutham
This patchset is a continuation to earlier submitted three patch
series to add a new driver for Marvell's OcteonTX2 SOC's
Resource virtualization unit (RVU) admin function driver.
1. octeontx2-af: Add RVU Admin Function driver
On Sat, Oct 27, 2018 at 12:59 AM Arnd Bergmann wrote:
>
> On Fri, Oct 26, 2018 at 6:33 PM Sunil Kovvuri wrote:
> > On Fri, Oct 26, 2018 at 9:56 PM Sunil Kovvuri
> > wrote:
> > > On Fri, Oct 26, 2018 at 7:34 PM Arnd Bergmann wrote:
> > > > > On 10/26/
On Fri, Oct 26, 2018 at 9:56 PM Sunil Kovvuri wrote:
>
> On Fri, Oct 26, 2018 at 7:34 PM Arnd Bergmann wrote:
> >
> > On 10/26/18, Sunil Kovvuri wrote:
> > > On Fri, Oct 26, 2018 at 6:24 PM Arnd Bergmann wrote:
> > >>
> > >> I see this has be
On Fri, Oct 26, 2018 at 7:34 PM Arnd Bergmann wrote:
>
> On 10/26/18, Sunil Kovvuri wrote:
> > On Fri, Oct 26, 2018 at 6:24 PM Arnd Bergmann wrote:
> >>
> >> I see this has been applied, but I'd still like to understand better how
> >> the
> >>
On Fri, Oct 26, 2018 at 6:24 PM Arnd Bergmann wrote:
>
> On 10/23/18, David Miller wrote:
> > From: sunil.kovv...@gmail.com
> > Date: Mon, 22 Oct 2018 23:25:47 +0530
> >
> >> From: Sunil Goutham
> >>
> >> This patchset is a continuation to earlier submitted two patch
> >> series to add a new
On Thu, Oct 25, 2018 at 7:02 AM Wei Yongjun wrote:
>
> The function nix_update_mce_list() is called from
> nix_update_bcast_mce_list(), and a spin lock is held
> here, so we should use GFP_ATOMIC instead.
>
> Fixes: 4b05528ebf0c ("octeontx2-af: Update bcast list upon NIXLF alloc/free")
>
From: Stanislaw Kardach
Add LMAC channel info like Rx/Tx channel base and count to
NIXLF_ALLOC mailbox message response. This info is used by
NIXLF attached RVU PF/VF to configure SQ's default channel,
TL3_TL2_LINKX_CFG and to install MCAM rules in NPC based
on matching ingress channel number.
From: Sunil Goutham
Upon NIXLF_ALLOC install a unicast forwarding rule in NPC MCAM
like below
- Match pkt DMAC with NIXLF attached PF/VF's MAC address.
- Ingress channel
- Action is UCAST
- Forward to PF_FUNC of this NIXLF
And broadcast pkt forwarding rule as
- Match L2B bit in MCAM search
From: Sunil Goutham
This patch adds some minimal configuration for NPC MCAM and
LDATA extraction which is sufficient enough to install
ucast/bcast/promiscuous forwarding rules. Below is the
config done
- LDATA extraction config to extract DMAC from pkt
to offset 64bit in MCAM search key.
- Set
From: Sunil Goutham
Configure NIX RX flowkey algorithm configuration to support
RSS (receive side scaling). Currently support for only L3/L4
2-tuple and 4-tuple hash of IPv4/v6/TCP/UDP/SCTP is added.
HW supports upto 32 different flowkey algorithms which SW
can define, this patch defines 9. NPC
From: Sunil Goutham
This patch adds support for a RVU PF/VF to change
NIX Rx flowkey algorithm index in NPC RX RSS_ACTION.
eg: a ethtool command changing RSS algorithm for a netdev
interface would trigger this change in NPC.
If PF/VF doesn't specify any MCAM entry index then default
UCAST entry
From: Sunil Goutham
Added a new mailbox message for a PF/VF to set/update
it's NIXLF's MAC address. Also updates unicast NPC
MCAM entry with this address as matching DMAC.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 8 ++-
From: Sunil Goutham
By default NIXLF is set in UCAST mode. This patch adds a new
mailbox message which when sent by a RVU PF changes this default
mode. When promiscuous mode is needed, the reserved promisc entry
for each of RVU PF is setup to match against ingress channel number
only, so that
From: Sunil Goutham
This patch adds support for a PF/VF driver to configure
NIX transmit scheduler queues via mbox. Since PF/VF doesn't
know the absolute HW index of the NIXLF attached to it, AF
traps the register config and overwrites with the correct
NIXLF index.
HW supports shaping,
From: Sunil Goutham
Added support for a PF/VF to allocate or free NIX transmit
scheduler queues via mbox. For setting up pkt transmission
priorities between queues, the scheduler queues have to be
contiguous w.r.t their HW indices. So both contiguous and
non-contiguous allocations are supported.
From: Sunil Goutham
This patch configures all 16 KPUs and iKPU (pkinds) with
the KPU parser profile defined in npc_profile.h. Each KPU
engine has a 128 entry CAM, only CAM entries which are listed
in the profile are enabled and rest are left disabled.
Also
- Memory is allocated for pkind's
From: Sunil Goutham
Upon NIXLF ALLOC/FREE, add or remove corresponding PF_FUNC from
the broadcast packet replication list of the CGX LMAC mapped
RVU PF.
Signed-off-by: Sunil Goutham
---
.../net/ethernet/marvell/octeontx2/af/rvu_nix.c| 133 +
1 file changed, 133
From: Vamsi Attunuru
Added support for PF/VF drivers to configure NIX to
capture and/or strip VLAN tag from ingress packets.
Signed-off-by: Vamsi Attunuru
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 35 -
From: Sunil Goutham
Allocate memory for mcast/bcast/mirror replication entry
contexts, replication buffers (used by HW) and config HW
with corresponding memory bases. Added support for installing
MCEs via NIX AQ mbox.
For now support is restricted to broadcast pkt replication,
hence MCE table
From: Hao Zheng
NPC block is responsible for parsing and forwarding
packets to different NIXLFs. NPC has 16 KPU engines
(Kangaroo parse engine) and one iKPU which represents
pkinds. Each physical port either CGX/LBK is assigned
a pkind and upon receiving a packet HW takes that port's
pkind and
From: Vamsi Attunuru
This patch adds a new mailbox message to reset
a NIXLF's receive and transmit HW stats.
Signed-off-by: Vamsi Attunuru
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 3 ++-
drivers/net/ethernet/marvell/octeontx2/af/rvu.h| 2 ++
From: Geetha sowjanya
For each CGX LMAC that is mapped to a RVU PF, allocate
a pkind and config the same in CGX. For a received packet
at CGX LMAC interface this pkind is used by NPC block
to start parsing of packet.
Signed-off-by: Geetha sowjanya
Signed-off-by: Sunil Goutham
---
From: Sunil Goutham
Config NPC layer info from KPU profile into protocol
checker to identify outer L2/IPv4/TCP/UDP headers in a
packet. And enable IPv4 checksum validation.
L3/L4 and L4 CSUM validation will be enabled by PF/VF
drivers by configuring NIX_AF_LF(0..127)_RX_CFG via mbox
i.e
From: Sunil Goutham
This patchset is a continuation to earlier submitted two patch
series to add a new driver for Marvell's OcteonTX2 SOC's
Resource virtualization unit (RVU) admin function driver.
1. octeontx2-af: Add RVU Admin Function driver
From: Stanislaw Kardach
Add LMAC channel info like Rx/Tx channel base and count to
NIXLF_ALLOC mailbox message response. This info is used by
NIXLF attached RVU PF/VF to configure SQ's default channel,
TL3_TL2_LINKX_CFG and to install MCAM rules in NPC based
on matching ingress channel number.
From: Hao Zheng
NPC block is responsible for parsing and forwarding
packets to different NIXLFs. NPC has 16 KPU engines
(Kangaroo parse engine) and one iKPU which represents
pkinds. Each physical port either CGX/LBK is assigned
a pkind and upon receiving a packet HW takes that port's
pkind and
From: Sunil Goutham
Added a new mailbox message for a PF/VF to set/update
it's NIXLF's MAC address. Also updates unicast NPC
MCAM entry with this address as matching DMAC.
Signed-off-by: Sunil Goutham
---
drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 8 ++-
From: Sunil Goutham
By default NIXLF is set in UCAST mode. This patch adds a new
mailbox message which when sent by a RVU PF changes this default
mode. When promiscuous mode is needed, the reserved promisc entry
for each of RVU PF is setup to match against ingress channel number
only, so that
From: Sunil Goutham
This patch adds some minimal configuration for NPC MCAM and
LDATA extraction which is sufficient enough to install
ucast/bcast/promiscuous forwarding rules. Below is the
config done
- LDATA extraction config to extract DMAC from pkt
to offset 64bit in MCAM search key.
- Set
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