On 2024/04/24 19:30, Dmitry Osipenko wrote:
On 4/19/24 12:18, Akihiko Odaki wrote:
@@ -61,6 +61,10 @@ struct virtio_gpu_simple_resource {
int dmabuf_fd;
uint8_t *remapped;
+ MemoryRegion *mr;
+ bool async_unmap_completed;
+ bool async_unmap_in_progress;
+
Don't add
On 2024/04/24 18:43, Dmitry Osipenko wrote:
On 4/19/24 11:53, Akihiko Odaki wrote:
On 2024/04/19 4:00, Dmitry Osipenko wrote:
Add new "suspended" flag to virtio_gpu_ctrl_command telling cmd
processor that it should stop processing commands and retry again
next time until flag is unset.
> -Original Message-
> From: Matheus Bernardino (QUIC)
> Sent: Friday, April 26, 2024 1:16 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain ; Sid Manning ;
> a...@rev.ng; a...@rev.ng; ltaylorsimp...@gmail.com
> Subject: [PATCH] Hexagon: add PC alignment check and exception
>
> The
14.03.2024 09:15, Yong-Xuan Wang:
The timebase-frequency of guest OS should be the same with host
machine. The timebase-frequency value in DTS should be got from
hypervisor when using KVM acceleration.
This change ended up in stable-8.2 (v8.2.3). Interestingly, this thing
compiled not even
On 4/26/2024 6:07 PM, Zhao Liu wrote:
Update the comment to match the X86ConfidentialGuestClass
implementation.
Suggested-by: Xiaoyao Li
I think it should be "Reported-by"
Signed-off-by: Zhao Liu
---
target/i386/confidential-guest.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Dongwon Kim
Draw routine needs to be manually invoked in the next refresh
if there is a scanout blob from the guest. This is to prevent
a situation where there is a scheduled draw event but it won't
happen bacause the window is currently in inactive state
(minimized or tabified). If draw
On 4/25/24 14:43, Eric Blake wrote:
The following changes since commit 5da72194df36535d773c8bdc951529ecd5e31707:
Merge tag 'pull-tcg-20240424' ofhttps://gitlab.com/rth7680/qemu into
staging (2024-04-24 15:51:49 -0700)
are available in the Git repository at:
On 4/26/2024 3:07 AM, Zhao Liu wrote:
> Add feature definiations for KVM_CPUID_FEATURES in CPUID (
> CPUID[4000_0001].EAX and CPUID[4000_0001].EDX), to get rid of lots of
> offset calculations.
>
> Signed-off-by: Zhao Liu
> ---
> v2: Changed the prefix from CPUID_FEAT_KVM_* to CPUID_KVM_*.
On 4/26/24 13:35, Collin Walling wrote:
> On 4/26/24 04:42, Markus Armbruster wrote:
>> Collin Walling writes:
>>
>>> Retain a list of deprecated features disjoint from any particular
>>> CPU model. A query-cpu-model-expansion reply will now provide a list of
>>> properties (i.e. features) that
"exec/cpu-all.h" doesn't need definitions from "qemu/rcu.h",
however "exec/ram_addr.h" does.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231211212003.21686-17-phi...@linaro.org>
---
include/exec/cpu-all.h | 1 -
include/exec/ram_addr.h | 1 +
2 files
Only include what is required, avoiding the full
CPUState API from the huge "hw/core/cpu.h" header.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240418192525.97451-4-phi...@linaro.org>
---
include/hw/core/tcg-cpu-ops.h | 6 +-
1 file changed, 5
Last use of tswapls() was removed 2 years ago in commit
aee14c77f4 ("linux-user: Rewrite do_getdents, do_getdents64").
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20231212123401.37493-15-phi...@linaro.org>
Reviewed-by: Richard Henderson
---
HVF has a specific use of the CPUState::vcpu_dirty field
(CPUState::vcpu_dirty is not used by common code).
To make this field accel-specific, add and use a new
@dirty variable in the AccelCPUState structure.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id:
CPUArchState 'env' field is defined within the ArchCPU structure,
so we need to include each target "cpu.h" header which defines it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
Message-Id: <20231211212003.21686-2-phi...@linaro.org>
---
include/exec/cpu-all.h | 1 +
1 file
We usually check target endianess before swapping values,
so target_words_bigendian() declaration makes sense in
"exec/tswap.h" with the target swapping helpers.
Remove "hw/core/cpu.h" when it was only included to get
the target_words_bigendian() declaration.
Signed-off-by: Philippe
Since commit c006147122 ("plugins: create CPUPluginState and
migrate plugin_mask") "qemu/plugin.h" uses DECLARE_BITMAP(),
which is declared in "qemu/bitmap.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Pierrick Bouvier
Message-Id:
NVMM has a specific use of the CPUState::vcpu_dirty field
(CPUState::vcpu_dirty is not used by common code).
To make this field accel-specific, add and use a new
@dirty variable in the AccelCPUState structure.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id:
Nothing is required from "qemu/thread.h" in "exec/cpu-all.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20231212123401.37493-13-phi...@linaro.org>
Reviewed-by: Richard Henderson
---
include/exec/cpu-all.h | 1 -
1 file changed, 1 deletion(-)
diff --git
"exec/user/abitypes.h" requires:
- "exec/cpu-defs.h" (TARGET_LONG_BITS)
- "exec/tswap.h" (tswap32)
In order to avoid "cpu.h", pick the minimum required headers.
Assert this user-specific header is only included from user
emulation.
Signed-off-by: Philippe Mathieu-Daudé
Nothing in guestfd.c requires "semihosting/uaccess.h" nor "qemu.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20231212123401.37493-8-phi...@linaro.org>
Reviewed-by: Richard Henderson
---
semihosting/guestfd.c | 5 +
1 file changed, 1 insertion(+), 4
Avoid TCG specific declarations being used from non-TCG accelerators.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240418192525.97451-5-phi...@linaro.org>
---
include/exec/cputlb.h | 5 +
1 file changed, 5 insertions(+)
diff --git
The abi_ptr type is declared in "exec/cpu_ldst.h" with all
the load/store helpers. Some source files requiring abi_ptr
type don't need the load/store helpers. In order to simplify,
create a new "exec/abi_ptr.h" header.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
"exec/cpu_ldst.h" is specific to TCG, do not allow its
inclusion from other accelerators.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240418192525.97451-6-phi...@linaro.org>
---
include/exec/cpu_ldst.h | 6 +-
1 file changed, 5 insertions(+), 1
The following CPUTLBEntry helpers are only used in accel/tcg/cputlb.c:
- tlb_index()
- tlb_entry()
- tlb_read_idx()
- tlb_addr_write()
Move them to this file, allowing to remove the huge "cpu.h" header
inclusion from "exec/cpu_ldst.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by:
The include/user/ directory contains the user-emulation
specific headers. Move guest-base.h there too.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20240418192525.97451-15-phi...@linaro.org>
---
include/exec/cpu-all.h | 2 +-
include/{exec =>
tswapl() and bswaptls() are target-dependent and only used
by user emulation. Move their definitions to a new header:
"exec/user/tswap-target.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20231212123401.37493-17-phi...@linaro.org>
Reviewed-by: Richard
Since commit 139c1837db ("meson: rename included C source files
to .c.inc"), QEMU standard procedure for included C files is to
use *.c.inc.
Besides, since commit 6a0057aa22 ("docs/devel: make a statement
about includes") this is documented in the Coding Style:
If you do use template header
Due to missing headers, when including "tb-jmp-cache.h" we might get:
accel/tcg/tb-jmp-cache.h:21:21: error: field ‘rcu’ has incomplete type
21 | struct rcu_head rcu;
| ^~~
accel/tcg/tb-jmp-cache.h:24:9: error: unknown type name ‘vaddr’
24 |
Declare 'have_guest_base' in "user/guest-base.h".
Very few files require this header, so explicitly include
it there instead of "exec/cpu-all.h" which is used in many
source files.
Assert this user-specific header is only included from user
emulation.
Signed-off-by: Philippe Mathieu-Daudé
'abi_ptr' is a user specific type. The system emulation
equivalent is 'target_ulong'. Use it in ppc_ldl_code()
to emphasis this is not an user emulation function.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Nicholas Piggin
Reviewed-by: Thomas Huth
Message-Id:
tcg_cpu_init_cflags() accesses CPUState fields, so requires
"hw/core/cpu.h" to get its structure definition.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Message-Id: <20231212123401.37493-12-phi...@linaro.org>
Reviewed-by: Richard Henderson
---
accel/tcg/tcg-accel-ops.c
set_helper_retaddr() is only used in accel/tcg/user-exec.c.
clear_helper_retaddr() is only used in accel/tcg/cpu-exec.c
and accel/tcg/user-exec.c.
No need to expose their definitions to all user-emulation
files including "exec/cpu_ldst.h", move them to a new
"user-retaddr.h" header (restricted
The MMUAccessType enum is declared in "hw/core/cpu.h".
"hw/core/cpu.h" contains declarations related to CPUState
and CPUClass. Some source files only require MMUAccessType
and don't need to pull in all CPU* declarations. In order
to simplify, create a new "exec/mmu-access-type.h" header.
The CPUBreakpoint and CPUWatchpoint structures are declared
in "hw/core/cpu.h", which contains declarations related to
CPUState and CPUClass. Some source files only require the
BP/WP definitions and don't need to pull in all CPU* API.
In order to simplify, create a new "exec/breakpoint.h" header.
"semihosting/uaccess.h" only requires the following headers:
- "exec/cpu-defs.h" for target_ulong,
- "exec/cpu-common.h" for cpu_memory_rw_debug()
- "exec/tswap.h" for tswap32() and tswap64().
Include them instead of the huge "cpu.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by:
WHPX has a specific use of the CPUState::vcpu_dirty field
(CPUState::vcpu_dirty is not used by common code).
To make this field accel-specific, add and use a new
@dirty variable in the AccelCPUState structure.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id:
Since commit 139c1837db ("meson: rename included C source files
to .c.inc"), QEMU standard procedure for included C files is to
use *.c.inc.
Besides, since commit 6a0057aa22 ("docs/devel: make a statement
about includes") this is documented in the Coding Style:
If you do use template header
Slightly simplify by checking NEED_CPU_H definition in header.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240322161439.6448-2-phi...@linaro.org>
---
include/gdbstub/helpers.h | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git
Functions such gdb_get_cpu_pid() dereference CPUState so
require the structure declaration from "hw/core/cpu.h":
static uint32_t gdb_get_cpu_pid(CPUState *cpu)
{
...
return cpu->cluster_index + 1;
}
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
Message-Id:
The following changes since commit a118c4aff4087eafb68f7132b233ad548cf16376:
Merge tag 'hw-misc-20240425' of https://github.com/philmd/qemu into staging
(2024-04-25 09:43:29 -0700)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/accel-20240426
for you
The XRSTOR instruction ends calling tlb_flush(), declared
in "exec/exec-all.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231211212003.21686-13-phi...@linaro.org>
---
target/i386/tcg/fpu_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git
User-only objects might benefit from the "exec/target_page.h"
API, which allows to build some objects once for all targets.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Warner Losh
Reviewed-by: Richard Henderson
Message-Id: <20231211212003.21686-3-phi...@linaro.org>
---
meson.build
We have abi_ulong == uint32_t for the 32-bit ABI.
Use the generic type to avoid to depend on the
"exec/user/abitypes.h" header.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240418192525.97451-14-phi...@linaro.org>
---
target/sparc/gdbstub.c | 2 +-
1 file
accel/tcg/ files requires the following definitions:
- TARGET_LONG_BITS
- TARGET_PAGE_BITS
- TARGET_PHYS_ADDR_SPACE_BITS
- TCG_GUEST_DEFAULT_MO
The first 3 are defined in "cpu-param.h". The last one
in "cpu.h", with a bunch of definitions irrelevant for
TCG. By moving the
We only need the "exec/tswap.h" and "cpu-param.h" headers.
Only include "cpu.h" in the target gdbstub.c source files.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240418192525.97451-20-phi...@linaro.org>
---
include/gdbstub/helpers.h | 3 ++-
'NEED_CPU_H' guard target-specific code; it is defined by meson
altogether with the 'CONFIG_TARGET' definition. Rename NEED_CPU_H
as COMPILING_PER_TARGET to clarify its meaning.
Mechanical change running:
$ sed -i s/NEED_CPU_H/COMPILING_PER_TARGET/g $(git grep -l NEED_CPU_H)
then manually add
tlb_set_dirty() is only used in accel/tcg/cputlb.c,
where it is defined. Declare it statically, removing
the stub.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Harsh Prateek Bora
Reviewed-by: Richard Henderson
Message-Id: <20240418192525.97451-11-phi...@linaro.org>
---
Theses files call cpu_ldl_code() which is declared
in "exec/cpu_ldst.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20231211212003.21686-5-phi...@linaro.org>
---
accel/tcg/translator.c| 1 +
target/hexagon/translate.c| 1 +
On 4/18/24 12:25, Philippe Mathieu-Daudé wrote:
"qemu/plugin.h" uses DECLARE_BITMAP(), which is
declared in "qemu/bitmap.h".
Signed-off-by: Philippe Mathieu-Daudé
---
include/qemu/plugin.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h
On 4/26/24 13:45, David Hildenbrand wrote:
> On 26.04.24 19:44, David Hildenbrand wrote:
>> On 24.04.24 23:56, Collin Walling wrote:
>>> Retain a list of deprecated features disjoint from any particular
>>> CPU model. A query-cpu-model-expansion reply will now provide a list of
>>> properties
The Hexagon Programmer's Reference Manual says that the exception 0x1e
should be raised upon an unaligned program counter. Let's implement that
and also add tests for both the most common case as well as packets with
multiple change-of-flow instructions.
Signed-off-by: Matheus Tavares Bernardino
On 4/26/24 19:34, Aditya Gupta wrote:
Hello Cédric,
<...snip...>
- * Multi processor support for POWER8, POWER8NVL and POWER9.
+ * Multi processor support for POWER8, POWER8NVL, POWER9, POWER10 and Power11.
POWER10 -> Power10. Don't ask me why.
Sure, got it !
* XSCOM, serial
On 26.04.24 19:44, David Hildenbrand wrote:
On 24.04.24 23:56, Collin Walling wrote:
Retain a list of deprecated features disjoint from any particular
CPU model. A query-cpu-model-expansion reply will now provide a list of
properties (i.e. features) that are flagged as deprecated. Example:
> > Quoting lines from docs/system/ppc/powernv.rst:
> >
> > > Missing devices
> > > ---
> > >
> > > A lot is missing, among which :
> > >
> > > * I2C controllers (yet to be merged).
> > > * NPU/NPU2/NPU3 controllers.
> > > * EEH support for PCIe Host bridge controllers.
> > >
On 24.04.24 23:56, Collin Walling wrote:
Retain a list of deprecated features disjoint from any particular
CPU model. A query-cpu-model-expansion reply will now provide a list of
properties (i.e. features) that are flagged as deprecated. Example:
{
"return": {
"model": {
On Fri, Apr 26, 2024 at 04:38:13PM +0200, Cédric Le Goater wrote:
> On 4/26/24 13:00, Aditya Gupta wrote:
> > Skiboot/OPAL patches are in discussion upstream [1], with corresponding
> > commits in github repository [2].
> >
> > Update skiboot.lid, with binary built from 'upstream_power11' branch
On 4/26/24 19:05, Aditya Gupta wrote:
Hello Cédric,
Thanks for your reviews.
On Fri, Apr 26, 2024 at 04:27:04PM +0200, Cédric Le Goater wrote:
Hello Aditya
On 4/26/24 13:00, Aditya Gupta wrote:
Add base support for "--cpu power11" in QEMU.
Power11 core is same as Power10, hence reuse
On Fri, Apr 26, 2024 at 04:32:18PM +0200, Cédric Le Goater wrote:
> On 4/26/24 13:00, Aditya Gupta wrote:
> > Make Power11 as default cpu type for 'pseries' and 'powernv' machine type,
> > with Power11 being the newest supported Power processor in QEMU.
>
> This is too early. We should merge
On Fri, Apr 26, 2024 at 04:33:33PM +0200, Cédric Le Goater wrote:
> On 4/26/24 13:00, Aditya Gupta wrote:
> > Power11 core is same as Power10, reuse PNV10_SBER initialisation, by
> > declaring PNV11_PSI as child class of PNV10_PSI
> >
> > Cc: Cédric Le Goater
> > Cc: Frédéric Barrat
> > Cc:
On Fri, Apr 26, 2024 at 04:33:23PM +0200, Cédric Le Goater wrote:
> On 4/26/24 13:00, Aditya Gupta wrote:
> > Power11 core is same as Power10, reuse PNV10_PSI initialisation, by
> > declaring 'PNV11_PSI' as child class of 'PNV10_PSI'
> >
> > Cc: Cédric Le Goater
> > Cc: Frédéric Barrat
> > Cc:
On Fri, Apr 26, 2024 at 04:33:13PM +0200, Cédric Le Goater wrote:
> On 4/26/24 13:00, Aditya Gupta wrote:
> > Power11 core is same as Power10, reuse PNV10_OCC initialisation,
> > by declaring `PNV11_OCC` as child class of `PNV10_OCC`
>
> Reviewed-by: Cédric Le Goater
Thanks Cédric !
- Aditya
On Fri, Apr 26, 2024 at 04:32:52PM +0200, Cédric Le Goater wrote:
> On 4/26/24 13:00, Aditya Gupta wrote:
> > Power11 core is same as Power10 core, declare PNV11_LPC as a child
> > class of PNV10_LPC, so it goes through same class init
> >
> > Cc: Cédric Le Goater
> > Cc: Frédéric Barrat
> >
On Fri, Apr 26, 2024 at 04:32:37PM +0200, Cédric Le Goater wrote:
> On 4/26/24 13:00, Aditya Gupta wrote:
> > Power11 core is same as Power10, declare PNV11_HOMER as a child
> > class of PNV10_HOMER, so it goes through same class init
> >
> > Cc: Cédric Le Goater
> > Cc: Frédéric Barrat
> > Cc:
On 24.04.2024 00:27, Peter Xu wrote:
On Tue, Apr 23, 2024 at 06:14:18PM +0200, Maciej S. Szmigiero wrote:
We don't lose any genericity since by default the transfer is done via
mixed RAM / device state multifd channels from a shared pool.
It's only when x-multifd-channels-device-state is set
On 4/26/24 04:42, Markus Armbruster wrote:
> Collin Walling writes:
>
>> Retain a list of deprecated features disjoint from any particular
>> CPU model. A query-cpu-model-expansion reply will now provide a list of
>> properties (i.e. features) that are flagged as deprecated. Example:
>>
>> {
On 26/4/24 18:23, Thomas Huth wrote:
According to the comment in qga/meson.build, the test got disabled
since there were problems with the fuzzing job. But instead of
disabling this test completely, we should still be fine running
it when fuzzing is disabled.
Signed-off-by: Thomas Huth
---
Hello Cédric,
> >
> > <...snip...>
> >
> > - * Multi processor support for POWER8, POWER8NVL and POWER9.
> > + * Multi processor support for POWER8, POWER8NVL, POWER9, POWER10 and
> > Power11.
>
> POWER10 -> Power10. Don't ask me why.
Sure, got it !
>
> >* XSCOM, serial communication
On 24.04.2024 00:35, Peter Xu wrote:
On Wed, Apr 24, 2024 at 12:25:08AM +0200, Maciej S. Szmigiero wrote:
On 24.04.2024 00:20, Peter Xu wrote:
On Tue, Apr 23, 2024 at 06:15:35PM +0200, Maciej S. Szmigiero wrote:
On 19.04.2024 17:31, Peter Xu wrote:
On Fri, Apr 19, 2024 at 11:07:21AM +0100,
On Fri, Apr 26, 2024 at 11:12:50AM +0200, Markus Armbruster wrote:
> nifan@gmail.com writes:
>
> > From: Fan Ni
> >
> > To simulate FM functionalities for initiating Dynamic Capacity Add
> > (Opcode 5604h) and Dynamic Capacity Release (Opcode 5605h) as in CXL spec
> > r3.1 7.6.7.6.5 and
On 4/26/24 19:12, Aditya Gupta wrote:
Hello Cédric,
diff --git a/docs/system/ppc/pseries.rst b/docs/system/ppc/pseries.rst
index a876d897b6e4..3277564b34c2 100644
--- a/docs/system/ppc/pseries.rst
+++ b/docs/system/ppc/pseries.rst
@@ -15,9 +15,9 @@ Supported devices
=
*
Hello Cédric,
> >
> > <...snip...>
> >
> > diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h
> > index 8589f3291ed3..ebfe82b89537 100644
> > --- a/include/hw/ppc/pnv_chip.h
> > +++ b/include/hw/ppc/pnv_chip.h
> > @@ -17,12 +17,21 @@
> > OBJECT_DECLARE_TYPE(PnvChip,
Hello Cédric,
> > diff --git a/docs/system/ppc/pseries.rst b/docs/system/ppc/pseries.rst
> > index a876d897b6e4..3277564b34c2 100644
> > --- a/docs/system/ppc/pseries.rst
> > +++ b/docs/system/ppc/pseries.rst
> > @@ -15,9 +15,9 @@ Supported devices
> > =
> >* Multi processor
Hello Cédric,
Thanks for your reviews.
On Fri, Apr 26, 2024 at 04:27:04PM +0200, Cédric Le Goater wrote:
> Hello Aditya
>
> On 4/26/24 13:00, Aditya Gupta wrote:
> > Add base support for "--cpu power11" in QEMU.
> >
> > Power11 core is same as Power10, hence reuse functions defined for
> >
On Fri, Apr 26, 2024 at 04:55:55PM +0100, Jonathan Cameron wrote:
> On Wed, 24 Apr 2024 10:33:33 -0700
> Ira Weiny wrote:
>
> > Markus Armbruster wrote:
> > > nifan@gmail.com writes:
> > >
> > > > From: Fan Ni
> > > >
> > > > Since fabric manager emulation is not supported yet, the
According to the comment in qga/meson.build, the test got disabled
since there were problems with the fuzzing job. But instead of
disabling this test completely, we should still be fine running
it when fuzzing is disabled.
Signed-off-by: Thomas Huth
---
qga/meson.build | 5 ++---
1 file
On 4/25/24 5:02 AM, Cédric Le Goater wrote:
Signed-off-by: Cédric Le Goater
---
hw/vfio/ap.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
LGTM
Reviewed-by: Anthony Krowiak
diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c
index
On 26/04/2024 15.46, Eldon Stegall wrote:
On Fri, Apr 26, 2024 at 02:47:20PM +0200, Thomas Huth wrote:
With regards to NetBSD and OpenBSD, this is not a step backward since these
gitlab jobs were never run anyway (they could only be triggered manually,
but hardly anybody did that AFAIK).
If we
On 4/26/24 00:35, Xiong Yining wrote:
From: xiongyining1480
Enable CPU cluster support on SbsaQemu platform, so that users can
specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And
this topology can be passed to the firmware through DT cpu-map.
Signed-off-by: Xiong Yining
On Fri, 26 Apr 2024, Philippe Mathieu-Daudé wrote:
On 26/4/24 14:37, Akihiko Odaki wrote:
On 2024/04/24 21:32, Thomas Huth wrote:
On 24/04/2024 12.41, Prasad Pandit wrote:
On Wednesday, 24 April, 2024 at 03:36:01 pm IST, Philippe Mathieu-Daudé
wrote:
On 1/6/23 05:18, Akihiko Odaki wrote:
On Thu, 25 Apr 2024 10:30:51 -0700
Ira Weiny wrote:
> Markus Armbruster wrote:
> > fan writes:
> >
> > > On Wed, Apr 24, 2024 at 03:09:52PM +0200, Markus Armbruster wrote:
> > >> nifan@gmail.com writes:
> > >>
> > >> > From: Fan Ni
> > >> >
> > >> > Since fabric manager emulation
On Wed, 24 Apr 2024 10:33:33 -0700
Ira Weiny wrote:
> Markus Armbruster wrote:
> > nifan@gmail.com writes:
> >
> > > From: Fan Ni
> > >
> > > Since fabric manager emulation is not supported yet, the change implements
> > > the functions to add/release dynamic capacity extents as QMP
On 26/04/2024 17.39, Alex Bennée wrote:
The libssh bug references 18.04 which we are no longer running. We
don't need to disable glusterfs because a linux-user build shouldn't
be trying to link to it anyway.
Signed-off-by: Alex Bennée
---
.gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml |
On 26/04/2024 17.39, Alex Bennée wrote:
20.04 is dead (from QEMU's point of view), long live 22.04!
Signed-off-by: Alex Bennée
---
.gitlab-ci.d/custom-runners.yml | 2 +-
...20.04-s390x.yml => ubuntu-22.04-s390x.yml} | 28 +--
2 files changed, 15
On 26/04/2024 17.39, Alex Bennée wrote:
Upgrading the s390x runner exposed some packages are not available for
it. Add an additional optional stage we only enable for arm64/x86_64
for now.
Signed-off-by: Alex Bennée
---
scripts/ci/setup/build-environment.yml | 16 +---
1 file
The libssh bug references 18.04 which we are no longer running. We
don't need to disable glusterfs because a linux-user build shouldn't
be trying to link to it anyway.
Signed-off-by: Alex Bennée
---
.gitlab-ci.d/custom-runners/ubuntu-22.04-s390x.yml | 4 +---
1 file changed, 1 insertion(+), 3
I was asked to update the custom gitlab runner from the aging 20.04 to
22.04 which has been done. However I needed to update the provisioning
scripts and clean-up some of the cruft. Sadly this doesn't seem to be
passing cleanly as we have:
- qtest-s390x/migration-test ERROR 98.94s
20.04 is dead (from QEMU's point of view), long live 22.04!
Signed-off-by: Alex Bennée
---
.gitlab-ci.d/custom-runners.yml | 2 +-
...20.04-s390x.yml => ubuntu-22.04-s390x.yml} | 28 +--
2 files changed, 15 insertions(+), 15 deletions(-)
rename
Upgrading the s390x runner exposed some packages are not available for
it. Add an additional optional stage we only enable for arm64/x86_64
for now.
Signed-off-by: Alex Bennée
---
scripts/ci/setup/build-environment.yml | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
On 4/24/24 8:54 AM, Cédric Le Goater wrote:
Also change the return value of vfio_ap_register_irq_notifier() to be
a bool since it takes and 'Error **' argument. See the qapi/error.h
Rules section.
LGTM
Signed-off-by: Anthony Krowiak
Signed-off-by: Cédric Le Goater
---
hw/vfio/ap.c
On Fri, Apr 26, 2024 at 02:47:20PM +0200, Thomas Huth wrote:
> With regards to NetBSD and OpenBSD, this is not a step backward since these
> gitlab jobs were never run anyway (they could only be triggered manually,
> but hardly anybody did that AFAIK).
>
> If we want to have proper support for
On 24/4/24 19:45, Philippe Mathieu-Daudé wrote:
We want CPUState to only contain fields used by common code.
Start using a specific @dirty field for HVF/NVMM/WHPX
(TCG then KVM will follow).
Philippe Mathieu-Daudé (3):
accel/whpx: Use accel-specific per-vcpu @dirty field
accel/nvmm: Use
On 4/26/24 13:00, Aditya Gupta wrote:
Power11 core is same as Power10, use the existing functionalities to
introduce a Power11 chip and machine, with Power10 chip as parent of
Power11 chip, thus going through similar class_init paths
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J
On 4/26/24 13:00, Aditya Gupta wrote:
Skiboot/OPAL patches are in discussion upstream [1], with corresponding
commits in github repository [2].
Update skiboot.lid, with binary built from 'upstream_power11' branch
of skiboot repository with Power11 enablement patches [2].
---
This patch can be
On 4/26/24 13:00, Aditya Gupta wrote:
Power11 core is same as Power10, reuse PNV10_SBER initialisation, by
declaring PNV11_PSI as child class of PNV10_PSI
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Madhavan Srinivasan
Cc: Nicholas Piggin
Signed-off-by: Aditya
On 4/26/24 13:00, Aditya Gupta wrote:
Power11 core is same as Power10 core, declare PNV11_LPC as a child
class of PNV10_LPC, so it goes through same class init
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Madhavan Srinivasan
Cc: Nicholas Piggin
Signed-off-by: Aditya
On 4/26/24 13:00, Aditya Gupta wrote:
Power11 core is same as Power10, reuse PNV10_PSI initialisation, by
declaring 'PNV11_PSI' as child class of 'PNV10_PSI'
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Madhavan Srinivasan
Cc: Nicholas Piggin
Signed-off-by: Aditya
On 4/26/24 13:00, Aditya Gupta wrote:
Power11 core is same as Power10, declare PNV11_HOMER as a child
class of PNV10_HOMER, so it goes through same class init
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Madhavan Srinivasan
Cc: Nicholas Piggin
Signed-off-by: Aditya
Fabiano Rosas writes:
> Add the direct-io migration parameter that tells the migration code to
> use O_DIRECT when opening the migration stream file whenever possible.
>
> This is currently only used with the mapped-ram migration that has a
> clear window guaranteed to perform aligned writes.
>
On 4/26/24 13:00, Aditya Gupta wrote:
Power11 core is same as Power10, reuse PNV10_OCC initialisation,
by declaring `PNV11_OCC` as child class of `PNV10_OCC`
Reviewed-by: Cédric Le Goater
Thanks,
C.
Cc: Cédric Le Goater
Cc: Frédéric Barrat
Cc: Mahesh J Salgaonkar
Cc: Madhavan
On 4/26/24 13:00, Aditya Gupta wrote:
Make Power11 as default cpu type for 'pseries' and 'powernv' machine type,
with Power11 being the newest supported Power processor in QEMU.
This is too early. We should merge Power11 support first, possibly in 9.1,
and then change default in a future
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