Re: [PATCH] target/arm: Restrict translation disabled alignment check to VMSA

On 5/3/24 07:58, Philippe Mathieu-Daudé wrote: On 24/4/24 19:09, Richard Henderson wrote: For cpus using PMSA, when the MPU is disabled, the default memory type is Normal, Non-cachable. Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when translation disabled") Reported-by:

Re: [PATCH] target/arm: Restrict translation disabled alignment check to VMSA

On 24/4/24 19:09, Richard Henderson wrote: For cpus using PMSA, when the MPU is disabled, the default memory type is Normal, Non-cachable. Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when translation disabled") Reported-by: Clément Chigot Signed-off-by: Richard Henderson

Re: [PATCH] target/arm: Restrict translation disabled alignment check to VMSA

On Mon, 22 Apr 2024 at 18:07, Richard Henderson wrote: > > For cpus using PMSA, when the MPU is disabled, the default memory > type is Normal, Non-cachable. > > Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when > translation disabled") > Reported-by: Clément Chigot >

[PATCH] target/arm: Restrict translation disabled alignment check to VMSA

For cpus using PMSA, when the MPU is disabled, the default memory type is Normal, Non-cachable. Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when translation disabled") Reported-by: Clément Chigot Signed-off-by: Richard Henderson --- Since v9 will likely be tagged tomorrow

Re: [PATCH] target/arm: Restrict translation disabled alignment check to VMSA

On Mon, Apr 22, 2024 at 11:02 PM Philippe Mathieu-Daudé wrote: > > On 22/4/24 19:09, Richard Henderson wrote: > > On 4/22/24 10:07, Richard Henderson wrote: > >> For cpus using PMSA, when the MPU is disabled, the default memory > >> type is Normal, Non-cachable. > >> > >> Fixes: 59754f85ed3

Re: [PATCH] target/arm: Restrict translation disabled alignment check to VMSA

On 22/4/24 19:09, Richard Henderson wrote: On 4/22/24 10:07, Richard Henderson wrote: For cpus using PMSA, when the MPU is disabled, the default memory type is Normal, Non-cachable. Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when translation disabled") Reported-by:

Re: [PATCH] target/arm: Restrict translation disabled alignment check to VMSA

On 4/22/24 10:07, Richard Henderson wrote: For cpus using PMSA, when the MPU is disabled, the default memory type is Normal, Non-cachable. Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when translation disabled") Reported-by: Clément Chigot Signed-off-by: Richard Henderson

[PATCH] target/arm: Restrict translation disabled alignment check to VMSA

For cpus using PMSA, when the MPU is disabled, the default memory type is Normal, Non-cachable. Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when translation disabled") Reported-by: Clément Chigot Signed-off-by: Richard Henderson --- Since v9 will likely be tagged tomorrow