Re: [PATCH 30/57] target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB

2024-05-23 Thread Richard Henderson
On 5/23/24 07:14, Peter Maydell wrote: void gen_gvec_uqadd_qc(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, uint32_t rm_ofs, uint32_t opr_sz, uint32_t max_sz) { static const TCGOpcode vecop_list[] = { -INDEX_op_usadd_vec, INDEX_op_cmp_vec,

Re: [PATCH 30/57] target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB

2024-05-23 Thread Peter Maydell
On Mon, 6 May 2024 at 02:07, Richard Henderson wrote: > > No need for a full comparison; xor produces non-zero bits > for QC just fine. > > Signed-off-by: Richard Henderson > --- > target/arm/tcg/gengvec.c | 32 > 1 file changed, 16 insertions(+), 16

[PATCH 30/57] target/arm: Improve vector UQADD, UQSUB, SQADD, SQSUB

2024-05-05 Thread Richard Henderson
No need for a full comparison; xor produces non-zero bits for QC just fine. Signed-off-by: Richard Henderson --- target/arm/tcg/gengvec.c | 32 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/target/arm/tcg/gengvec.c b/target/arm/tcg/gengvec.c