Re: [PATCH 0/3] Remove useless architecture prefix from the CPU list

This series has been successfully tested in x86. Execute the cpu help command and check in the list the x86 prefix is no longer present. Tested-by: Mario Casquero On Sat, Apr 20, 2024 at 7:47 AM Thomas Huth wrote: > > Printing an architecture prefix in front of each CPU name is not helpful >

[PATCH v7 08/17] hw/loongarch: Init efi_fdt table

Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240307164835.300412-9-gaos...@loongson.cn> --- include/hw/loongarch/boot.h | 4 include/hw/loongarch/virt.h | 2 ++ hw/loongarch/boot.c | 11 +++ hw/loongarch/virt.c | 6 ++ 4 files changed, 19

[PATCH v7 09/17] hw/loongarch: Fix fdt memory node wrong 'reg'

The right fdt memory node like [1], not [2] [1] memory@0 { device_type = "memory"; reg = <0x00 0x00 0x00 0x1000>; }; [2] memory@0 { device_type = "memory"; reg = <0x02 0x00 0x02 0x1000>; };

[PATCH v7 06/17] hw/loongarch: Init efi_boot_memmap table

Signed-off-by: Song Gao Message-Id: <20240307164835.300412-7-gaos...@loongson.cn> --- include/hw/loongarch/boot.h | 27 + include/hw/loongarch/virt.h | 10 ++ hw/loongarch/boot.c | 40 + hw/loongarch/virt.c | 11

Re: [PATCH] system/qdev-monitor: move drain_call_rcu call under if (!dev) in qmp_device_add()

On Fri, Apr 26, 2024 at 11:57 AM +0300, Dmitrii Gavrilov wrote: > 26.04.2024, 11:17, "Marc Hartmayer" : > > On Fri, Nov 03, 2023 at 01:56 PM +0300, Dmitrii Gavrilov > wrote: > > Original goal of addition of drain_call_rcu to qmp_device_add was to cover > the failure case of

[PATCH v2 03/10] ppc/pnv: Add a Power11 Pnv11Chip, and a Power11 Machine

Power11 core is same as Power10, use the existing functionalities to introduce a Power11 chip and machine, with Power10 chip as parent of Power11 chip, thus going through similar class_init paths Cc: Cédric Le Goater Cc: Frédéric Barrat Cc: Mahesh J Salgaonkar Cc: Madhavan Srinivasan Cc:

[PATCH v2 01/10] ppc/pseries: Add Power11 cpu type

Add base support for "--cpu power11" in QEMU. Power11 core is same as Power10, hence reuse functions defined for Power10. Cc: Cédric Le Goater Cc: Daniel Henrique Barboza Cc: David Gibson Cc: Harsh Prateek Bora Cc: Mahesh J Salgaonkar Cc: Madhavan Srinivasan Cc: Nicholas Piggin

[PATCH v2 04/10] ppc/pnv: Add HOMER for POWER11

Power11 core is same as Power10, declare PNV11_HOMER as a child class of PNV10_HOMER, so it goes through same class init Cc: Cédric Le Goater Cc: Frédéric Barrat Cc: Mahesh J Salgaonkar Cc: Madhavan Srinivasan Cc: Nicholas Piggin Signed-off-by: Aditya Gupta --- hw/ppc/pnv_homer.c |

[PATCH v2 00/10] Power11 support for QEMU

Overview Add support for Power11 pseries and powernv machine types, to emulate VMs running on Power11. As Power11 core is same as Power10, hence much of the code has been reused from Power10. Also make Power11 as default cpu type for 'pseries' and 'powernv' machine types, with

[PATCH v2 06/10] ppc/pnv: Add OCC for Power11

Power11 core is same as Power10, reuse PNV10_OCC initialisation, by declaring `PNV11_OCC` as child class of `PNV10_OCC` Cc: Cédric Le Goater Cc: Frédéric Barrat Cc: Mahesh J Salgaonkar Cc: Madhavan Srinivasan Cc: Nicholas Piggin Signed-off-by: Aditya Gupta --- hw/ppc/pnv_occ.c | 14

[PATCH] .gitlab-ci.d/cirrus: Remove the netbsd and openbsd jobs

During the past months, the netbsd and openbsd jobs in the Cirrus-CI were broken most of the time - the setup to run a BSD in KVM on Cirrus-CI from gitlab via the cirrus-run script was very fragile, and since the jobs were not run by default, it used to bitrot very fast. Now Cirrus-CI also

Re: [PATCH] system/qdev-monitor: move drain_call_rcu call under if (!dev) in qmp_device_add()

  26.04.2024, 11:17, "Marc Hartmayer" :On Fri, Nov 03, 2023 at 01:56 PM +0300, Dmitrii Gavrilov wrote: Original goal of addition of drain_call_rcu to qmp_device_add was to cover the failure case of qdev_device_add. It seems call of drain_call_rcu was misplaced in

Re: [PATCH v4 08/14] migration/multifd: Add new migration option for multifd DSA offloading.

Daniel P. Berrangé writes: > On Thu, Apr 25, 2024 at 02:21:11AM +, Hao Xiang wrote: >> Intel DSA offloading is an optional feature that turns on if >> proper hardware and software stack is available. To turn on >> DSA offloading in multifd live migration: >> >>

Re: [PATCH] mc146818rtc: add a way to generate RTC interrupts via QMP

Daniil Tatianin writes: > On 4/26/24 11:39 AM, Markus Armbruster wrote: > >> Daniil Tatianin writes: >> >>> This can be used to force-synchronize the time in guest after a long >>> stop-cont pause, which can be useful for serverless-type workload. >>> >>> Signed-off-by: Daniil Tatianin >>> ---

Re: [PATCH] mc146818rtc: add a way to generate RTC interrupts via QMP

Hi Daniil, Markus, On 26/4/24 10:39, Markus Armbruster wrote: Daniil Tatianin writes: This can be used to force-synchronize the time in guest after a long stop-cont pause, which can be useful for serverless-type workload. Signed-off-by: Daniil Tatianin --- hw/rtc/mc146818rtc.c |

[PATCH 1/6] target/i386/kvm: Add feature bit definitions for KVM CPUID

Add feature definiations for KVM_CPUID_FEATURES in CPUID ( CPUID[4000_0001].EAX and CPUID[4000_0001].EDX), to get rid of lots of offset calculations. Signed-off-by: Zhao Liu --- v2: Changed the prefix from CPUID_FEAT_KVM_* to CPUID_KVM_*. (Xiaoyao) --- hw/i386/kvm/clock.c | 5 ++---

[PATCH v2 05/10] ppc/pnv: Add a LPC controller for POWER11

Power11 core is same as Power10 core, declare PNV11_LPC as a child class of PNV10_LPC, so it goes through same class init Cc: Cédric Le Goater Cc: Frédéric Barrat Cc: Mahesh J Salgaonkar Cc: Madhavan Srinivasan Cc: Nicholas Piggin Signed-off-by: Aditya Gupta --- hw/ppc/pnv_lpc.c |

Re: [PATCH] stubs: Add missing qga stubs

On 25/4/24 13:04, Konstantin Kostiuk wrote: Compilation QGA without system and user fails ./configure --disable-system --disable-user --enable-guest-agent So this config isn't tested on CI. Maybe worth enabling QGA in the build-tools-and-docs-debian job? Please include the link failure:

Re: [PATCH] mc146818rtc: add a way to generate RTC interrupts via QMP

Daniil Tatianin writes: > This can be used to force-synchronize the time in guest after a long > stop-cont pause, which can be useful for serverless-type workload. > > Signed-off-by: Daniil Tatianin > --- > hw/rtc/mc146818rtc.c | 15 +++ > include/hw/rtc/mc146818rtc.h | 1

[PATCH 0/2] Fixed the problem of vhost-user reconnection

Previous discussion here: https://lore.kernel.org/all/f86d6159-5610-476c-a69e-cd3a717f9...@nvidia.com/ The merged version cannot fully cover all possible scenarios. Here we revert the previous fixes and then use new methods to fix them. Li Feng (2): Revert "vhost-user: fix lost reconnect"

[PATCH v2 08/10] ppc/pnv: Add SBE model for Power11

Power11 core is same as Power10, reuse PNV10_SBER initialisation, by declaring PNV11_PSI as child class of PNV10_PSI Cc: Cédric Le Goater Cc: Frédéric Barrat Cc: Mahesh J Salgaonkar Cc: Madhavan Srinivasan Cc: Nicholas Piggin Signed-off-by: Aditya Gupta --- hw/ppc/pnv_sbe.c | 15

Re: [PATCH v1] virtio-mem: improve error message when unplug of device fails due to plugged memory

This patch has been successfully tested. Boot up a VM with a virtio-mem device, hotplug some memory increasing the requested-size, finally try to unplug the device and see the new message: (qemu) device_del vmem0 Error: virtio-mem device cannot get unplugged while some of its memory is still

Re: [PATCH v2 1/3] cpu-models: add "disable-deprecated-feats" option to cpu model expansion

Collin Walling writes: > On 4/25/24 02:31, Markus Armbruster wrote: >> Collin Walling writes: >> >>> On 4/24/24 02:19, Markus Armbruster wrote: Collin Walling writes: > This optional parameter for query-cpu-model-expansion enables CPU > model features flagged as deprecated

[PATCH] Fix vhost user assertion when sending more than one fd

If the client sends more than one region this assert triggers. The reason is that two fd's are 8 bytes and VHOST_MEMORY_BASELINE_NREGIONS is exactly 8. The assert is wrong because it should not test for the size of the fd array, but for the numbers of regions. Signed-off-by: Christian Pötzsch

[PATCH 1/2] Revert "vhost-user: fix lost reconnect"

This reverts commit f02a4b8e6431598612466f76aac64ab492849abf. Signed-off-by: Li Feng --- hw/block/vhost-user-blk.c | 2 +- hw/scsi/vhost-user-scsi.c | 3 +-- hw/virtio/vhost-user-base.c| 2 +- hw/virtio/vhost-user.c | 10 ++ include/hw/virtio/vhost-user.h | 3

[PATCH 2/2] vhost-user: fix lost reconnect again

When the vhost-user is reconnecting to the backend, and if the vhost-user fails at the get_features in vhost_dev_init(), then the reconnect will fail and it will not be retriggered forever. The reason is: When the vhost-user fail at get_features, the vhost_dev_cleanup will be called immediately.

[PATCH 6/6] target/i386/confidential-guest: Fix comment of x86_confidential_guest_kvm_type()

Update the comment to match the X86ConfidentialGuestClass implementation. Suggested-by: Xiaoyao Li Signed-off-by: Zhao Liu --- target/i386/confidential-guest.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/confidential-guest.h

[PATCH 0/6] target/i386: Misc cleanup on KVM PV defs and outdated comments

Hi, This series picks cleanup from my previous kvmclock [1] (as other renaming attempts were temporarily put on hold). In addition, this series also include the cleanup on a historically workaround and recent comment of coco interface [2]. Avoiding the fragmentation of these misc cleanups, I

[PATCH 5/6] target/i386/kvm: Drop workaround for KVM_X86_DISABLE_EXITS_HTL typo

The KVM_X86_DISABLE_EXITS_HTL typo has been fixed in commit 77d361b13c19 ("linux-headers: Update to kernel mainline commit b357bf602"). Drop the related workaround. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 4 1 file changed, 4 deletions(-) diff --git a/target/i386/kvm/kvm.c

[PATCH 3/6] target/i386/kvm: Only Save/load kvmclock MSRs when kvmclock enabled

MSR_KVM_SYSTEM_TIME and MSR_KVM_WALL_CLOCK are attached with the (old) kvmclock feature (KVM_FEATURE_CLOCKSOURCE). So, just save/load them only when kvmclock (KVM_FEATURE_CLOCKSOURCE) is enabled. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 12 1 file changed, 8

[PATCH 4/6] target/i386/kvm: Save/load MSRs of new kvmclock (KVM_FEATURE_CLOCKSOURCE2)

MSR_KVM_SYSTEM_TIME_NEW and MSR_KVM_WALL_CLOCK_NEW are bound to new kvmclock (KVM_FEATURE_CLOCKSOURCE2). Add the save/load support for these 2 MSRs. Signed-off-by: Zhao Liu --- target/i386/cpu.h | 2 ++ target/i386/kvm/kvm.c | 16 2 files changed, 18 insertions(+) diff

[PATCH 2/6] target/i386/kvm: Remove local MSR_KVM_WALL_CLOCK and MSR_KVM_SYSTEM_TIME definitions

These 2 MSRs have been already defined in the kvm_para header (standard-headers/asm-x86/kvm_para.h). Remove QEMU local definitions to avoid duplication. Reviewed-by: Xiaoyao Li Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 3 --- 1 file changed, 3 deletions(-) diff --git

[PATCH 4/6] target/i386/kvm: Save/load MSRs of kvmclock2 (KVM_FEATURE_CLOCKSOURCE2)

MSR_KVM_SYSTEM_TIME_NEW and MSR_KVM_WALL_CLOCK_NEW are bound to kvmclock2 (KVM_FEATURE_CLOCKSOURCE2). Add the save/load support for these 2 MSR just like kvmclock MSRs. Signed-off-by: Zhao Liu --- target/i386/cpu.h | 2 ++ target/i386/kvm/kvm.c | 16 2 files changed, 18

Re: [PATCH v4 1/1] hw/arm/sbsa-ref: Enable CPU cluster on ARM sbsa machine

W dniu 26.04.2024 o 09:35, Xiong Yining pisze: From: xiongyining1480 Enable CPU cluster support on SbsaQemu platform, so that users can specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this topology can be passed to the firmware through DT cpu-map. Signed-off-by: Xiong

[PATCH v2 07/10] ppc/pnv: Add a PSI bridge model for Power11

Power11 core is same as Power10, reuse PNV10_PSI initialisation, by declaring 'PNV11_PSI' as child class of 'PNV10_PSI' Cc: Cédric Le Goater Cc: Frédéric Barrat Cc: Mahesh J Salgaonkar Cc: Madhavan Srinivasan Cc: Nicholas Piggin Signed-off-by: Aditya Gupta --- hw/ppc/pnv_psi.c | 24

Re: [PATCH] system/qdev-monitor: move drain_call_rcu call under if (!dev) in qmp_device_add()

On Fri, Nov 03, 2023 at 01:56 PM +0300, Dmitrii Gavrilov wrote: > Original goal of addition of drain_call_rcu to qmp_device_add was to cover > the failure case of qdev_device_add. It seems call of drain_call_rcu was > misplaced in 7bed89958bfbf40df what led to waiting for pending RCU callbacks >

Re: [PATCH v5 3/3] Add support for RAPL MSRs in KVM/Qemu

Hi Paolo, Daniel P. Berrangé, Apr 25, 2024 at 17:42: > On Thu, Apr 25, 2024 at 05:34:52PM +0200, Anthony Harivel wrote: > > Hi Daniel, > > > > Daniel P. Berrangé, Apr 18, 2024 at 18:42: > > > > > > +if (kvm_is_rapl_feat_enable(cs)) { > > > > +if (!IS_INTEL_CPU(env)) { > > > > +

Re: [PATCH v3 1/2] target/s390x: report deprecated-props in cpu-model-expansion reply

Collin Walling writes: > Retain a list of deprecated features disjoint from any particular > CPU model. A query-cpu-model-expansion reply will now provide a list of > properties (i.e. features) that are flagged as deprecated. Example: > > { > "return": { > "model": { >

[PATCH v7 14/17] hw/loongarch: fdt adds pcie irq_map node

Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240307164835.300412-15-gaos...@loongson.cn> --- hw/loongarch/virt.c | 73 ++--- 1 file changed, 69 insertions(+), 4 deletions(-) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index

[PATCH v7 02/17] hw/loongarch: Add load initrd

we load initrd ramdisk after kernel_high address Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240307164835.300412-3-gaos...@loongson.cn> --- hw/loongarch/boot.c | 29 - 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/hw/loongarch/boot.c

[PATCH v7 16/17] hw/loongarch: Add cells missing from uart node

uart node need interrupts and interrupt-parent cells. Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240307164835.300412-17-gaos...@loongson.cn> --- hw/loongarch/virt.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/loongarch/virt.c

[PATCH v7 00/17] Add boot LoongArch elf kernel with FDT

Hi, All We already support boot efi kernel with bios, but not support boot elf kernel. This series adds boot elf kernel with FDT. 'LoongArch supports ACPI and FDT. The information that needs to be passed to the kernel includes the memmap, the initrd, the command line, optionally the ACPI/FDT

[PATCH v7 15/17] hw/loongarch: fdt remove unused irqchip node

Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240307164835.300412-16-gaos...@loongson.cn> --- hw/loongarch/virt.c | 31 +-- 1 file changed, 1 insertion(+), 30 deletions(-) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index

[PATCH v7 04/17] hw/loongarch: Add init_cmdline

Add init_cmline and set boot_info->a0, a1 Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240307164835.300412-5-gaos...@loongson.cn> --- include/hw/loongarch/virt.h | 2 ++ target/loongarch/cpu.h | 2 ++ hw/loongarch/boot.c | 30 ++ 3

[PATCH v7 10/17] hw/loongarch: fdt adds cpu interrupt controller node

fdt adds cpu interrupt controller node, we use 'loongson,cpu-interrupt-controller'. See: https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongarch-cpu.c https://lore.kernel.org/r/20221114113824.1880-2-liupei...@loongson.cn Signed-off-by: Song Gao Reviewed-by: Bibo Mao

[PATCH v7 07/17] hw/loongarch: Init efi_initrd table

Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240307164835.300412-8-gaos...@loongson.cn> --- include/hw/loongarch/boot.h | 9 + hw/loongarch/boot.c | 23 +-- 2 files changed, 30 insertions(+), 2 deletions(-) diff --git

[PATCH v7 11/17] hw/loongarch: fdt adds Extend I/O Interrupt Controller

fdt adds Extend I/O Interrupt Controller, we use 'loongson,ls2k2000-eiointc'. See: https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-eiointc.c https://lore.kernel.org/r/764e02d924094580ac0f1d15535f4b98308705c6.1683279769.git.zhoubin...@loongson.cn Signed-off-by: Song Gao

[PATCH v7 05/17] hw/loongarch: Init efi_system_table

Add init_systab and set boot_info->a2 Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240307164835.300412-6-gaos...@loongson.cn> --- include/hw/loongarch/boot.h | 48 + hw/loongarch/boot.c | 22 + 2 files changed, 70

[PATCH v7 01/17] hw/loongarch: Move boot functions to boot.c

Move some boot functions to boot.c and struct loongarch_boot_info into struct LoongArchMachineState. Signed-off-by: Song Gao Reviewed-by: Bibo Mao Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20240307164835.300412-2-gaos...@loongson.cn> --- include/hw/loongarch/boot.h | 21 ++

[PATCH v7 17/17] hw/loongarch: Add cells missing from rtc node

rtc node need interrupts and interrupt-parent cells. Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240307164835.300412-18-gaos...@loongson.cn> --- hw/loongarch/virt.c | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/loongarch/virt.c

[PATCH v7 12/17] hw/loongarch: fdt adds pch_pic Controller

fdt adds pch pic controller, we use 'loongson,pch-pic-1.0' See: https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-pic.c https://lore.kernel.org/r/20200528152757.1028711-4-jiaxun.y...@flygoat.com Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id:

[PATCH v7 03/17] hw/loongarch: Add slave cpu boot_code

Signed-off-by: Song Gao Message-Id: <20240307164835.300412-4-gaos...@loongson.cn> --- hw/loongarch/boot.c | 62 - 1 file changed, 61 insertions(+), 1 deletion(-) diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c index a9522d6912..d1a8434127

[PATCH v7 13/17] hw/loongarch: fdt adds pch_msi Controller

fdt adds pch msi controller, we use 'loongson,pch-msi-1.0'. See: https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongson-pch-msi.c https://lore.kernel.org/r/20200528152757.1028711-6-jiaxun.y...@flygoat.com Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id:

[PATCH v2 09/10] ppc: Make Power11 as default cpu type for 'pseries' and 'powernv'

Make Power11 as default cpu type for 'pseries' and 'powernv' machine type, with Power11 being the newest supported Power processor in QEMU. Cc: Cédric Le Goater Cc: Daniel Henrique Barboza Cc: David Gibson Cc: Frédéric Barrat Cc: Harsh Prateek Bora Cc: Mahesh J Salgaonkar Cc: Madhavan

[PATCH v2 02/10] ppc/pnv: Introduce 'PnvChipClass::chip_type'

Introduce 'PnvChipClass::chip_type' to easily get which Power chip is it. This helps generalise similar codes such as *_dt_populate, and removes duplication of code between Power11 and Power10 changes in following patches. Cc: Cédric Le Goater Cc: Frédéric Barrat Cc: Mahesh J Salgaonkar Cc:

Re: [PATCH] mc146818rtc: add a way to generate RTC interrupts via QMP

On 4/26/24 11:39 AM, Markus Armbruster wrote: Daniil Tatianin writes: This can be used to force-synchronize the time in guest after a long stop-cont pause, which can be useful for serverless-type workload. Signed-off-by: Daniil Tatianin --- hw/rtc/mc146818rtc.c | 15

Re: [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1

On Fri, Apr 26, 2024 at 03:43:15PM +0800, Zhao Liu wrote: > Date: Fri, 26 Apr 2024 15:43:15 +0800 > From: Zhao Liu > Subject: Re: [PULL v2 00/63] First batch of i386 and build system patch for > QEMU 9.1 > > Hi Paolo, > > On Fri, Apr 26, 2024 at 07:21:12AM +0200, Paolo Bonzini wrote: > > Date:

Re: [PATCH] Add support for abs info in vhost-user-input

Ping. Anyone interested? Thanks Chris On 3/22/24 11:24, Christian Pötzsch wrote: Absolute input device did not work, cause VIRTIO_INPUT_CFG_ABS_INFO is missing. Fetch this info when available and provide it to any virtio client. This is basically the same code as in

Re: [PATCH v7 09/12] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents

nifan@gmail.com writes: > From: Fan Ni > > To simulate FM functionalities for initiating Dynamic Capacity Add > (Opcode 5604h) and Dynamic Capacity Release (Opcode 5605h) as in CXL spec > r3.1 7.6.7.6.5 and 7.6.7.6.6, we implemented two QMP interfaces to issue > add/release dynamic capacity

Re: [PATCH] stubs: Add missing qga stubs

On Fri, Apr 26, 2024 at 2:08 PM Philippe Mathieu-Daudé wrote: > On 25/4/24 13:04, Konstantin Kostiuk wrote: > > Compilation QGA without system and user fails > > ./configure --disable-system --disable-user --enable-guest-agent > > So this config isn't tested on CI. > > Maybe worth enabling QGA

Re: [PATCH 0/6] migration removals & deprecations

Doesn't apply for me. What's your base?

[PATCH v4 0/1] ARM Sbsa-ref: Enable CPU cluster topology

Enable CPU cluster support on SbsaQemu platform, so that users can specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this topology can be passed to the firmware through DT cpu-map. Signed-off-by: Xiong Yining --- Changes in v4: - align the machine-version-minor to 4 Changes

[PATCH v4 1/1] hw/arm/sbsa-ref: Enable CPU cluster on ARM sbsa machine

From: xiongyining1480 Enable CPU cluster support on SbsaQemu platform, so that users can specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this topology can be passed to the firmware through DT cpu-map. Signed-off-by: Xiong Yining tested-by: Marcin Juszkiewicz ---

[PATCH v3 1/1] hw/arm/sbsa-ref: Enable CPU cluster on ARM sbsa machine

From: xiongyining1480 Enable CPU cluster support on SbsaQemu platform, so that users can specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this topology can be passed to the firmware through DT cpu-map. Signed-off-by: Xiong Yining tested-by: Marcin Juszkiewicz Change-Id:

[PATCH v3 0/1] ARM Sbsa-ref: Enable CPU cluster topology

Enable CPU cluster support on SbsaQemu platform, so that users can specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this topology can be passed to the firmware through DT cpu-map. Changes in v3: - squash the two patches together into one - add the DTB information in

Re: [PULL v2 00/63] First batch of i386 and build system patch for QEMU 9.1

Hi Paolo, On Fri, Apr 26, 2024 at 07:21:12AM +0200, Paolo Bonzini wrote: > Date: Fri, 26 Apr 2024 07:21:12 +0200 > From: Paolo Bonzini > Subject: Re: [PULL v2 00/63] First batch of i386 and build system patch for > QEMU 9.1 > > On Wed, Apr 24, 2024 at 8:49 PM Richard Henderson > wrote: > > >

Re: [PATCH v5 09/13] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents

On Thu, 25 Apr 2024 10:30:51 -0700 Ira Weiny wrote: > Markus Armbruster wrote: > > fan writes: > > > > > On Wed, Apr 24, 2024 at 03:09:52PM +0200, Markus Armbruster wrote: > > >> nifan@gmail.com writes: > > >> > > >> > From: Fan Ni > > >> > > > >> > Since fabric manager emulation

Re: [PATCH v2 1/2] net: Provide MemReentrancyGuard * to qemu_new_nic()

On Fri, 26 Apr 2024, Philippe Mathieu-Daudé wrote: On 26/4/24 14:37, Akihiko Odaki wrote: On 2024/04/24 21:32, Thomas Huth wrote: On 24/04/2024 12.41, Prasad Pandit wrote: On Wednesday, 24 April, 2024 at 03:36:01 pm IST, Philippe Mathieu-Daudé wrote: On 1/6/23 05:18, Akihiko Odaki wrote:

Re: [PATCH v2 01/10] ppc/pseries: Add Power11 cpu type

Hello Cédric, Thanks for your reviews. On Fri, Apr 26, 2024 at 04:27:04PM +0200, Cédric Le Goater wrote: > Hello Aditya > > On 4/26/24 13:00, Aditya Gupta wrote: > > Add base support for "--cpu power11" in QEMU. > > > > Power11 core is same as Power10, hence reuse functions defined for > >

Re: [PATCH v2 01/10] ppc/pseries: Add Power11 cpu type

On 4/26/24 19:12, Aditya Gupta wrote: Hello Cédric, diff --git a/docs/system/ppc/pseries.rst b/docs/system/ppc/pseries.rst index a876d897b6e4..3277564b34c2 100644 --- a/docs/system/ppc/pseries.rst +++ b/docs/system/ppc/pseries.rst @@ -15,9 +15,9 @@ Supported devices = *

Re: [PATCH v3 1/2] target/s390x: report deprecated-props in cpu-model-expansion reply

On 4/26/24 04:42, Markus Armbruster wrote: > Collin Walling writes: > >> Retain a list of deprecated features disjoint from any particular >> CPU model. A query-cpu-model-expansion reply will now provide a list of >> properties (i.e. features) that are flagged as deprecated. Example: >> >> {

Re: [PATCH v2 03/10] ppc/pnv: Add a Power11 Pnv11Chip, and a Power11 Machine

Hello Cédric, > > > > <...snip...> > > > > - * Multi processor support for POWER8, POWER8NVL and POWER9. > > + * Multi processor support for POWER8, POWER8NVL, POWER9, POWER10 and > > Power11. > > POWER10 -> Power10. Don't ask me why. Sure, got it ! > > >* XSCOM, serial communication

Re: [PATCH] qga: Re-enable the qga-ssh-test when running without fuzzing

On 26/4/24 18:23, Thomas Huth wrote: According to the comment in qga/meson.build, the test got disabled since there were problems with the fuzzing job. But instead of disabling this test completely, we should still be fine running it when fuzzing is disabled. Signed-off-by: Thomas Huth ---

Re: [PATCH RFC 00/26] Multifd  device state transfer support with VFIO consumer

On 24.04.2024 00:35, Peter Xu wrote: On Wed, Apr 24, 2024 at 12:25:08AM +0200, Maciej S. Szmigiero wrote: On 24.04.2024 00:20, Peter Xu wrote: On Tue, Apr 23, 2024 at 06:15:35PM +0200, Maciej S. Szmigiero wrote: On 19.04.2024 17:31, Peter Xu wrote: On Fri, Apr 19, 2024 at 11:07:21AM +0100,

Re: [PATCH v2 06/10] ppc/pnv: Add OCC for Power11

On Fri, Apr 26, 2024 at 04:33:13PM +0200, Cédric Le Goater wrote: > On 4/26/24 13:00, Aditya Gupta wrote: > > Power11 core is same as Power10, reuse PNV10_OCC initialisation, > > by declaring `PNV11_OCC` as child class of `PNV10_OCC` > > Reviewed-by: Cédric Le Goater Thanks Cédric ! - Aditya

Re: [PATCH v2 05/10] ppc/pnv: Add a LPC controller for POWER11

On Fri, Apr 26, 2024 at 04:32:52PM +0200, Cédric Le Goater wrote: > On 4/26/24 13:00, Aditya Gupta wrote: > > Power11 core is same as Power10 core, declare PNV11_LPC as a child > > class of PNV10_LPC, so it goes through same class init > > > > Cc: Cédric Le Goater > > Cc: Frédéric Barrat > >

Re: [PATCH v2 07/10] ppc/pnv: Add a PSI bridge model for Power11

On Fri, Apr 26, 2024 at 04:33:23PM +0200, Cédric Le Goater wrote: > On 4/26/24 13:00, Aditya Gupta wrote: > > Power11 core is same as Power10, reuse PNV10_PSI initialisation, by > > declaring 'PNV11_PSI' as child class of 'PNV10_PSI' > > > > Cc: Cédric Le Goater > > Cc: Frédéric Barrat > > Cc:

Re: [PATCH v3 1/2] target/s390x: report deprecated-props in cpu-model-expansion reply

On 26.04.24 19:44, David Hildenbrand wrote: On 24.04.24 23:56, Collin Walling wrote: Retain a list of deprecated features disjoint from any particular CPU model. A query-cpu-model-expansion reply will now provide a list of properties (i.e. features) that are flagged as deprecated. Example:

Re: [PATCH v2 03/10] ppc/pnv: Add a Power11 Pnv11Chip, and a Power11 Machine

On 4/26/24 19:34, Aditya Gupta wrote: Hello Cédric, <...snip...> - * Multi processor support for POWER8, POWER8NVL and POWER9. + * Multi processor support for POWER8, POWER8NVL, POWER9, POWER10 and Power11. POWER10 -> Power10. Don't ask me why. Sure, got it ! * XSCOM, serial

[PULL 04/38] exec: Expose 'target_page.h' API to user emulation

User-only objects might benefit from the "exec/target_page.h" API, which allows to build some objects once for all targets. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-3-phi...@linaro.org> --- meson.build

[PULL 14/38] target/i386: Include missing 'exec/exec-all.h' header

The XRSTOR instruction ends calling tlb_flush(), declared in "exec/exec-all.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-13-phi...@linaro.org> --- target/i386/tcg/fpu_helper.c | 1 + 1 file changed, 1 insertion(+) diff --git

[PULL 06/38] gdbstub: Include missing 'hw/core/cpu.h' header

Functions such gdb_get_cpu_pid() dereference CPUState so require the structure declaration from "hw/core/cpu.h": static uint32_t gdb_get_cpu_pid(CPUState *cpu) { ... return cpu->cluster_index + 1; } Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Warner Losh Message-Id:

[PULL 00/38] Exec / accelerators patches

The following changes since commit a118c4aff4087eafb68f7132b233ad548cf16376: Merge tag 'hw-misc-20240425' of https://github.com/philmd/qemu into staging (2024-04-25 09:43:29 -0700) are available in the Git repository at: https://github.com/philmd/qemu.git tags/accel-20240426 for you

[PULL 13/38] target/sparc: Replace abi_ulong by uint32_t for TARGET_ABI32

We have abi_ulong == uint32_t for the 32-bit ABI. Use the generic type to avoid to depend on the "exec/user/abitypes.h" header. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-14-phi...@linaro.org> --- target/sparc/gdbstub.c | 2 +- 1 file

[PATCH] qga: Re-enable the qga-ssh-test when running without fuzzing

According to the comment in qga/meson.build, the test got disabled since there were problems with the fuzzing job. But instead of disabling this test completely, we should still be fine running it when fuzzing is disabled. Signed-off-by: Thomas Huth --- qga/meson.build | 5 ++--- 1 file

Re: [PATCH v5 09/13] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents

On Fri, Apr 26, 2024 at 04:55:55PM +0100, Jonathan Cameron wrote: > On Wed, 24 Apr 2024 10:33:33 -0700 > Ira Weiny wrote: > > > Markus Armbruster wrote: > > > nifan@gmail.com writes: > > > > > > > From: Fan Ni > > > > > > > > Since fabric manager emulation is not supported yet, the

Re: [PATCH v7 09/12] hw/cxl/events: Add qmp interfaces to add/release dynamic capacity extents

On Fri, Apr 26, 2024 at 11:12:50AM +0200, Markus Armbruster wrote: > nifan@gmail.com writes: > > > From: Fan Ni > > > > To simulate FM functionalities for initiating Dynamic Capacity Add > > (Opcode 5604h) and Dynamic Capacity Release (Opcode 5605h) as in CXL spec > > r3.1 7.6.7.6.5 and

Re: [PATCH v2 04/10] ppc/pnv: Add HOMER for POWER11

On Fri, Apr 26, 2024 at 04:32:37PM +0200, Cédric Le Goater wrote: > On 4/26/24 13:00, Aditya Gupta wrote: > > Power11 core is same as Power10, declare PNV11_HOMER as a child > > class of PNV10_HOMER, so it goes through same class init > > > > Cc: Cédric Le Goater > > Cc: Frédéric Barrat > > Cc:

Re: [PATCH v3 1/2] target/s390x: report deprecated-props in cpu-model-expansion reply

On 24.04.24 23:56, Collin Walling wrote: Retain a list of deprecated features disjoint from any particular CPU model. A query-cpu-model-expansion reply will now provide a list of properties (i.e. features) that are flagged as deprecated. Example: { "return": { "model": {

Re: [PATCH v2 01/10] ppc/pseries: Add Power11 cpu type

> > Quoting lines from docs/system/ppc/powernv.rst: > > > > > Missing devices > > > --- > > > > > > A lot is missing, among which : > > > > > > * I2C controllers (yet to be merged). > > > * NPU/NPU2/NPU3 controllers. > > > * EEH support for PCIe Host bridge controllers. > > >

[PATCH] Hexagon: add PC alignment check and exception

The Hexagon Programmer's Reference Manual says that the exception 0x1e should be raised upon an unaligned program counter. Let's implement that and also add tests for both the most common case as well as packets with multiple change-of-flow instructions. Signed-off-by: Matheus Tavares Bernardino

Re: [PATCH 18/24] plugins: Include missing 'qemu/bitmap.h' header

On 4/18/24 12:25, Philippe Mathieu-Daudé wrote: "qemu/plugin.h" uses DECLARE_BITMAP(), which is declared in "qemu/bitmap.h". Signed-off-by: Philippe Mathieu-Daudé --- include/qemu/plugin.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h

Re: [PATCH v2 02/10] ppc/pnv: Introduce 'PnvChipClass::chip_type'

Hello Cédric, > > > > <...snip...> > > > > diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h > > index 8589f3291ed3..ebfe82b89537 100644 > > --- a/include/hw/ppc/pnv_chip.h > > +++ b/include/hw/ppc/pnv_chip.h > > @@ -17,12 +17,21 @@ > > OBJECT_DECLARE_TYPE(PnvChip,

Re: [PATCH v2 08/10] ppc/pnv: Add SBE model for Power11

On Fri, Apr 26, 2024 at 04:33:33PM +0200, Cédric Le Goater wrote: > On 4/26/24 13:00, Aditya Gupta wrote: > > Power11 core is same as Power10, reuse PNV10_SBER initialisation, by > > declaring PNV11_PSI as child class of PNV10_PSI > > > > Cc: Cédric Le Goater > > Cc: Frédéric Barrat > > Cc:

Re: [PATCH v2 09/10] ppc: Make Power11 as default cpu type for 'pseries' and 'powernv'

On Fri, Apr 26, 2024 at 04:32:18PM +0200, Cédric Le Goater wrote: > On 4/26/24 13:00, Aditya Gupta wrote: > > Make Power11 as default cpu type for 'pseries' and 'powernv' machine type, > > with Power11 being the newest supported Power processor in QEMU. > > This is too early. We should merge

[PULL 08/38] gdbstub: Avoid including 'cpu.h' in 'gdbstub/helpers.h'

We only need the "exec/tswap.h" and "cpu-param.h" headers. Only include "cpu.h" in the target gdbstub.c source files. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-20-phi...@linaro.org> --- include/gdbstub/helpers.h | 3 ++-

[PULL 01/38] exec: Rename NEED_CPU_H -> COMPILING_PER_TARGET

'NEED_CPU_H' guard target-specific code; it is defined by meson altogether with the 'CONFIG_TARGET' definition. Rename NEED_CPU_H as COMPILING_PER_TARGET to clarify its meaning. Mechanical change running: $ sed -i s/NEED_CPU_H/COMPILING_PER_TARGET/g $(git grep -l NEED_CPU_H) then manually add

[PULL 11/38] target: Define TCG_GUEST_DEFAULT_MO in 'cpu-param.h'

accel/tcg/ files requires the following definitions: - TARGET_LONG_BITS - TARGET_PAGE_BITS - TARGET_PHYS_ADDR_SPACE_BITS - TCG_GUEST_DEFAULT_MO The first 3 are defined in "cpu-param.h". The last one in "cpu.h", with a bunch of definitions irrelevant for TCG. By moving the

[PULL 05/38] accel: Include missing 'exec/cpu_ldst.h' header

Theses files call cpu_ldl_code() which is declared in "exec/cpu_ldst.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20231211212003.21686-5-phi...@linaro.org> --- accel/tcg/translator.c| 1 + target/hexagon/translate.c| 1 +

[PULL 02/38] exec: Reduce tlb_set_dirty() declaration scope

tlb_set_dirty() is only used in accel/tcg/cputlb.c, where it is defined. Declare it statically, removing the stub. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Harsh Prateek Bora Reviewed-by: Richard Henderson Message-Id: <20240418192525.97451-11-phi...@linaro.org> ---

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