>-Original Message-
>From: Cédric Le Goater
>Subject: Re: [PATCH v3 06/19] range: Introduce range_get_last_bit()
>
>On 4/30/24 11:58, Duan, Zhenzhong wrote:
>>
>>
>>> -Original Message-
>>> From: Cédric Le Goater
>>> Subject: Re: [PATCH v3 06/19] range: Introduce
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with SH.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/sh4-softmmu/default.mak | 7
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with MIPS.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/mips-softmmu/common.mak |
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with PARISC.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/hppa-softmmu/default.mak | 5
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with RX.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/rx-softmmu/default.mak | 3 ++-
Let hw/hyperv/hyperv.c and hw/intc/s390_flic.c handle (respectively)
SynIC and adapter routes, removing the code from target-independent
files. This also removes the only occurrence of AdapterInfo outside
s390 code, so remove that from typedefs.h.
Signed-off-by: Paolo Bonzini
---
They are needed in very few places, which already depends on other generated
QAPI
files. The benefit of having these types in typedefs.h is small.
Signed-off-by: Paolo Bonzini
---
include/hw/core/cpu.h | 1 +
include/qemu/typedefs.h | 2 --
2 files changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 4 +++-
target/i386/tcg/decode-new.c.inc | 9 +
target/i386/tcg/emit.c.inc | 11 +++
3 files changed, 23 insertions(+), 1 deletion(-)
diff --git
Extract the code into new functions, and swap T0/T1 so that T0 corresponds
to the first immediate in the instruction stream.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 93 +
1 file changed, 53 insertions(+),
Since new opcodes are not going to be added in translate.c, round the
case labels that call to disas_insn_new(), including whole sets of
eight opcodes when possible.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 5 ++---
1 file changed, 2
The shift instructions are rewritten instead of reusing code from the old
decoder. Rotates use CC_OP_ADCOX more extensively and generally rely
more on the optimizer, so that the code generators are shared between
the immediate-count and variable-count cases.
In particular, this makes gen_RCL and
Compared to the old decoder, the main differences in translation
are for the little-used ARPL instruction. IMUL is adjusted a bit
to share more code to produce flags, but is otherwise very similar.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 3 +
This can be used to force-synchronize the time in guest after a long
stop-cont pause, which can be useful for serverless-type workload.
Also add a comment to highlight the fact that this (and one other QMP
command) only works for the MC146818 RTC controller.
Signed-off-by: Daniil Tatianin
---
Hi
This is a cleanup series to change VFIOIOMMUClass callbacks to return
bool when the error is passed through errp parameter.
See discussion at
https://lists.gnu.org/archive/html/qemu-devel/2024-04/msg04782.html
It looks many functions in VFIO sub-system need same change,
so this can be a
On 2024/5/6 下午12:24, Thomas Huth wrote:
On 06/05/2024 05.02, Bibo Mao wrote:
On LoongArch system, there is only virt machine type now, name
LOONGARCH_MACHINE is confused, rename it with VIRT_MACHINE. Machine name
about Other real hw boards can be added in future.
Signed-off-by: Bibo Mao
Sure, I'll do it!
Thanks,
Tanmay
On Mon, 6 May 2024 at 10:11, Thomas Huth wrote:
> On 04/05/2024 22.34, Michael Tokarev wrote:
> > 04.05.2024 21:58, Tanmay wrote:
> >> Hi,
> >>
> >> I have attached a patch file that fixes indentation and formatting for
> >> some files as listed in
>
Looks like this fell through the cracks.
As far as I can tell, the patch did come from @syrmia.com.
Cc'ing qemu-trivial.
Aleksandar Rikalo writes:
> Syrmia LLC has been acquired recently and the syrmia.com domain will
> disappear soon, so updating my email in the MAINTAINERS file.
>
>
Reviewed-by: Frank Chang
Daniel Henrique Barboza 於 2024年3月8日 週五 上午12:06寫道：
>
> From: Andrew Jones
>
> And add mrif notification trace.
>
> Signed-off-by: Andrew Jones
> Reviewed-by: Daniel Henrique Barboza
> ---
> hw/riscv/riscv-iommu-pci.c | 2 +-
> hw/riscv/riscv-iommu.c | 1 +
>
On 5/5/24 19:14, Dr. David Alan Gilbert wrote:
As far as I can tell it was never used.
Signed-off-by: Dr. David Alan Gilbert
---
hw/usb/dev-network.c | 8
1 file changed, 8 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
Exactly nobody needs it there. Place the typedef in the header
that defines the struct.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/net/announce.h | 4 ++--
include/qemu/typedefs.h | 1 -
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git
Together with the series at
https://patchew.org/QEMU/20240423131612.28362-1-pbonz...@redhat.com/,
this allows adding sparc-softmmu to the target list of the
build-without-defaults CI job.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
tests/qtest/m48t59-test.c | 11
With the introduction of TSTEQ and TSTNE the .mask field is always -1,
so remove all the now-unnecessary code.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 81 +
1 file changed, 27 insertions(+), 54
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 2 +-
target/i386/tcg/decode-new.c.inc | 120 ++
target/i386/tcg/emit.c.inc | 202 +++
3 files changed, 323 insertions(+), 1 deletion(-)
diff
Resetting cc_op to CC_OP_DYNAMIC should be done at control flow junctions,
which is not the case here. This translation block is ending and the
only effect of calling set_cc_op() would be a discard of s->cc_srcT.
This discard is useless (it's a temporary, not a global) and in fact
prevents
When testing the sign bit or equality to zero of a partial register, it
is useful to use a single TSTEQ or TSTNE operation. It can also be used
to test the parity flag, using bit 0 of the population count.
Do not do this for target_ulong-sized values however; the optimizer would
produce a
This series includes changes to the x86 TCG decoder that switch the
1-byte opcodes to the table-driven decoder (except for x87). A few
easy 2-byte opcodes are also converted (BSWAP, SETcc, CMOVcc,
MOVZX/MOVSX and those that are extensions of 1-byte opcodes like PUSH/POP
FS/GS, LFS/LGS/LSS).
add the Query Processing Library (QPL) compression method
Introduce the qpl as a new multifd migration compression method, it can
use In-Memory Analytics Accelerator(IAA) to accelerate compression and
decompression, which can not only reduce network bandwidth requirement
but also reduce host
each qpl job is used to (de)compress a normal page and it can
be processed independently by the IAA hardware. All qpl jobs
are submitted to the hardware at once, and wait for all jobs
completion. If hardware path(IAA) is not available, use software
for compression and decompression.
Different compression methods may require different numbers of IOVs.
Based on streaming compression of zlib and zstd, all pages will be
compressed to a data block, so two IOVs are needed for packet header
and compressed data block.
Signed-off-by: Yuan Liu
Reviewed-by: Nanhai Zou
---
add --enable-qpl and --disable-qpl options to enable and disable
the QPL compression method for multifd migration.
The Query Processing Library (QPL) is an open-source library
that supports data compression and decompression features. It
is based on the deflate compression algorithm and use Intel
Looks like this fell through the cracks. Is anyone familiar with LUKS
willing to review it?
Hyman Huang writes:
> Signed-off-by: Hyman Huang
> ---
> MAINTAINERS | 1 +
> docs/devel/luks-detached-header.rst | 182
> 2 files changed, 183
Hi Tejus,
(Also +Paolo/Daniel)
On Tue, Apr 30, 2024 at 06:14:52AM +, Tejus GK wrote:
> Date: Tue, 30 Apr 2024 06:14:52 +
> From: Tejus GK
> Subject: Re: [PATCH v11 19/21] i386: Add cache topology info in CPUCacheInfo
>
>
>
> On 24 Apr 2024, at 9:19 PM, Zhao Liu wrote:
>
> @@
On 5/5/24 19:14, Dr. David Alan Gilbert wrote:
This struct has been unused since
Commit f932093ae165 ("hw/arm/bcm2836: Split out common part of BCM283X
classes")
Rather than "splitting out", commit f932093ae165 duplicated BCM283XClass
as BCM283XBaseClass and left it unmodified.
Reviewed-by:
If virgl and opengl are not available, the build process creates a useless
libvirtio-vga-gl module that does not have any device in it. Follow the
example of virtio-vga-rutabaga and do not build the module at all in that
case.
Signed-off-by: Paolo Bonzini
---
hw/display/meson.build | 14
Exactly nobody needs them there. Place the typedef in the header
that defines the struct.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/qemu/typedefs.h | 2 --
include/sysemu/numa.h | 8
2 files changed, 4 insertions(+), 6 deletions(-)
diff --git
Using QemuLockable almost always requires going through QEMU_MAKE_LOCKABLE().
Therefore, there is little point in having the typedef always present. Move
it to lockable.h, with only a small adjustment to coroutine.h (which has
a tricky co-dependency with lockable.h due to defining CoMutex *and*
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with RISC-V.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/riscv32-softmmu/default.mak
It is needed in very few places, which already depend on other parts of
qdev-core.h files. The benefit of having it in typedefs.h is small.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/hw/qdev-core.h | 1 +
include/qemu/typedefs.h | 1 -
2 files changed, 1
Only FWCfgState is used as part of APIs such as acpi_ghes_add_fw_cfg.
Everything else need not be in typedefs.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/hw/nvram/fw_cfg.h | 2 ++
include/qemu/typedefs.h | 3 ---
2 files changed, 2 insertions(+), 3
Move it to the existing "PIC related things" header, hw/intc/i8259.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/hw/intc/i8259.h | 2 ++
include/qemu/typedefs.h | 1 -
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/hw/intc/i8259.h
Migration code needs no private fields of the coroutine backend.
Include the "regular" coroutine.h header.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
migration/migration.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/migration/migration.h
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with Loongarch.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
For types that are embedded in structs defined by pci.h, the definition
is pretty much required to be available. Remove them from typedefs.h.
Signed-off-by: Paolo Bonzini
---
include/hw/pci/pcie.h | 3 +++
include/hw/pci/pcie_aer.h | 38 ++---
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with Xtensa.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/xtensa-softmmu/default.mak |
The new conditions obviously come in handy when testing individual bits
of EFLAGS, and they make it possible to remove the .mask field of
CCPrepare.
Lowering to shift+and is done by the optimizer if necessary.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 27 +++
target/i386/tcg/decode-new.c.inc | 3 +++
2 files changed, 30 insertions(+)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index e36ed4dcc10..705e8f3ef49 100644
---
Create a new wrapper for syscall/sysret, and do not go through multiple
layers of wrappers.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/target/i386/tcg/translate.c
Hi Peter,
Thanks for the review.
> From: Peter Maydell
> Sent: Saturday, May 4, 2024 2:41 PM
>
> On Tue, 12 Mar 2024 at 02:02, Salil Mehta
> wrote:
> >
> > Virtual CPU Hot-unplug leads to unrealization of a CPU object. This
> > also involves destruction of the CPU AddressSpace. Add
On 4/5/24 16:32, Richard Henderson wrote:
On 5/4/24 07:17, Dorjoy Chowdhury wrote:
The value of the mp-affinity property being set in npcm7xx_realize is
always the same as the default value it would have when arm_cpu_realizefn
is called if the property is not set here. So there is no need to
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with AVR.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/avr-softmmu/default.mak | 5
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with CRIS.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/cris-softmmu/default.mak | 5
Move long-displacement Jcc, SETcc and CMOVcc to the new decoder.
While filling in the tables makes the code seem longer, the new
emitters are all just one line of code.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 1 +
A few two-byte opcodes are simple extensions of existing one-byte opcodes;
they are easy to decode and need no change to emit.c.inc. Port them to
the new decoder.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 1 +
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 2cd7868d596..7efd12cbe7e 100644
--- a/target/i386/tcg/translate.c
+++
gen_update_cc_op must be called before control flow splits. Do it
where the jump on ECX!=0 is translated.
On the other hand, remove the call before gen_jcc1, which takes care of
it already, and explain why REPZ/REPNZ need not use CC_OP_DYNAMIC---the
translation block ends before any
Boards have been switched to use "default y" and are now listed
in default-configs/*.mak only for convenience.
Document this change and the new possibilities that it allows.
Signed-off-by: Paolo Bonzini
---
docs/devel/kconfig.rst | 14 --
1 file changed, 12 insertions(+), 2
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with TriCore.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/tricore-softmmu/default.mak
On 5/5/24 19:14, Dr. David Alan Gilbert wrote:
As far as I can tell this struct has never been used in this
file (it is used in can_core.c).
Signed-off-by: Dr. David Alan Gilbert
---
net/can/can_host.c | 6 --
1 file changed, 6 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
add Intel Query Processing Library (QPL) compression method
introduction
Signed-off-by: Yuan Liu
Reviewed-by: Nanhai Zou
---
docs/devel/migration/features.rst| 1 +
docs/devel/migration/qpl-compression.rst | 262 +++
2 files changed, 263 insertions(+)
create mode
add qpl to compression method test for multifd migration
the qpl compression supports software path and hardware
path(IAA device), and the hardware path is used first by
default. If the hardware path is unavailable, it will
automatically fallback to the software path for testing.
Signed-off-by:
the qpl initialization includes memory allocation for compressed
data and the qpl job initialization.
the qpl job initialization will check if the In-Memory Analytics
Accelerator(IAA) device is available and use the IAA device first.
If the platform does not have IAA device or the IAA device is
The following changes since commit 4977ce198d2390bff8c71ad5cb1a5f6aa24b56fb:
Merge tag 'pull-tcg-20240501' of https://gitlab.com/rth7680/qemu into staging
(2024-05-01 15:15:33 -0700)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to
target/ppc/kvm.c calls out to code in hw/ppc/spapr*.c; that code is
not present and fails to link if CONFIG_PSERIES is not enabled.
Adjust kvm.c to depend on CONFIG_PSERIES instead of TARGET_PPC64,
and compile out anything that requires cap_papr, because only
the pseries machine will call
From: Ruihan Li
When emulated with QEMU, interrupts will never come in the following
loop. However, if the NOP instruction is uncommented, interrupts will
fire as normal.
loop:
cli
call do_sti
jmp loop
do_sti:
sti
KVM code might have to call functions on the PCIDevice that is
passed to kvm_arch_fixup_msi_route(). This fails in the case
where --without-default-devices is used and no board is
configured. While this is not really a useful configuration,
and therefore setting up stubs for CONFIG_PCI is
qga/commands-posix.c does not compile on FreeBSD due to a confusion
between "chpasswdata" (wrong) and "chpasswddata" (used in the #else
branch).
Fixes: 0e5b75a390 ("qga/commands-posix: qmp_guest_set_user_password: use
ga_run_command helper")
Reviewed-by: Thomas Huth
Signed-off-by: Paolo Bonzini
hw/core/cpu.h is already using struct forward declarations in some cases
to avoid inclusions, and otherwise CPUAddressSpace and CPUJumpCache
are only used together with their definition. CPUTLBEntryFull is
always used when their definition is available. Remove all three
from typedefs.h.
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with PowerPC/POWER.
No changes to generated config-devices.mak files, other than
adding CONFIG_PPC to the ppc64-softmmu target.
From: Lei Wang
Add the missing features(ss, tsc-adjust, cldemote, movdiri, movdir64b) in
the SapphireRapids-v3 CPU model.
Signed-off-by: Lei Wang
Message-ID: <20240424072912.43188-1-lei4.w...@intel.com>
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 11 +++
1 file changed, 11
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
MIPS boards may only be available for big-endian or only for
little-endian emulators, add a symbol so that this can be described
with a "depends on"
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Start with Alpha.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/alpha-softmmu/default.mak | 5
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with OpenRISC.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/or1k-softmmu/default.mak |
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with Microblaze.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
This is to follow the coding standand to return bool if 'Error **'
is used to pass error.
Suggested-by: Cédric Le Goater
Signed-off-by: Zhenzhong Duan
---
include/hw/vfio/vfio-container-base.h | 2 +-
hw/vfio/container.c | 10 +-
hw/vfio/spapr.c
Make VFIOIOMMUClass::add_window() and its wrapper function
vfio_container_add_section_window() return bool.
This is to follow the coding standand to return bool if 'Error **'
is used to pass error.
Suggested-by: Cédric Le Goater
Signed-off-by: Zhenzhong Duan
---
Make VFIOIOMMUClass::attach_device() and its wrapper function
vfio_attach_device() return bool.
This is to follow the coding standand to return bool if 'Error **'
is used to pass error.
Suggested-by: Cédric Le Goater
Signed-off-by: Zhenzhong Duan
---
include/hw/vfio/vfio-common.h | 4
On May 3 13:50, Vincent Fu wrote:
> The number of PIDs is in the upper 16 bits of cdw10. So we need to
> right-shift by 16 bits instead of only a single bit.
>
> Signed-off-by: Vincent Fu
> ---
> hw/nvme/ctrl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with SPARC and SPARC64.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with i386.
No changes to generated config-devices.mak files, other than
adding CONFIG_I386 to the x86_64-softmmu target.
Signed-off-by: Paolo
MonitorDef is defined by hmp-target.h, and all users except one already
include it; the reason why the stubs do not include it, is because
hmp-target.h currently can only be used in files that are compiled
per target. However, that is easily fixed. Because the benefit of
having MonitorDef in
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with s390.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/s390x-softmmu/default.mak | 5
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with m68k.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/m68k-softmmu/default.mak | 13
Match the optional device groups to what is actually included in
the config-devices.mak files.
Signed-off-by: Paolo Bonzini
---
configs/devices/arm-softmmu/default.mak | 2 ++
configs/devices/loongarch64-softmmu/default.mak | 3 +++
configs/devices/or1k-softmmu/default.mak| 4
sparc-softmmu is able to run a subset of qtests when compiled
--without-default-devices,
so use it instead of x86_64-softmmu for the msys2 run.
Signed-off-by: Paolo Bonzini
---
.gitlab-ci.d/windows.yml | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
= (cdw10 & 0xff);
+uint8_t mo = cdw10 & 0xf;
switch (mo) {
case NVME_IOMS_MO_NOP:
---
base-commit: 84b0eb1826f690aa8d51984644318ee6c810f5bf
change-id: 20240506-fix-ioms-mo-97098c6c5396
Best regards,
--
Klaus Jensen
On 5/5/24 09:23, Bin Meng wrote:
From: Bin Meng
The old Wind River email address (bin.m...@windriver.com) is no longer
available due to an internal infrastructure change within the company.
While a new email address (bin.meng...@windriver.com) has been assigned
to me, I am unable to find a way
Hi Salil,
On Fri, May 03, 2024 at 07:59:32PM +, Salil Mehta wrote:
> Date: Fri, 3 May 2024 19:59:32 +
> From: Salil Mehta
> Subject: RE: [PATCH V8 3/8] hw/acpi: Update ACPI GED framework to support
> vCPU Hotplug
>
> Hello,
>
> Sorry, I missed this earlier.
>
> > From: Zhao Liu
> >
On 5/5/24 14:10, BALATON Zoltan wrote:
This macro can be used to abbreviate PAGE_READ | PAGE_WRITE | PAGE_EXEC
for which PAGE_RWX is a better name and renaming it also shows it is
not related to TARGET_PAGE_BITS.
Signed-off-by: BALATON Zoltan
---
accel/tcg/user-exec.c | 2 +-
It is defined and referred to exclusively from a .c file.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/qemu/typedefs.h | 1 -
migration/postcopy-ram.c | 4 ++--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/include/qemu/typedefs.h
Avoids an explicit use of sizeof(). The GLib allocation macros
ensure that the multiplication by the size of the element
uses the right type and does not overflow.
While at it, change bitmap_new() to use g_new0 directly. Its current
impl of calling bitmap_try_new() followed by a plain abort()
Basically all uses of GraphicHwOps are defining an instance of it, which
requires the
full definition of the struct. It is pointless to have it in typedefs.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
hw/display/vga_int.h| 1 +
include/qemu/typedefs.h | 1 -
2
QemuOpt is basically an internal data structure. It has no business
being defined except if you need functions from include/qemu/option.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/qemu/option.h | 2 ++
include/qemu/typedefs.h | 1 -
2 files changed, 2
For ARM targets, boards that require TCG are already using "default y".
Switch ARM_VIRT to the same selection mechanism.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/arm-softmmu/default.mak | 3 ++-
.gitlab-ci.d/buildtest.yml |
Instead of using s->tmp0 or s->tmp4 as the result, just extend the cc_*
registers in place. It is harmless and, if multiple setcc instructions
are used, the optimizer will be able to remove the redundant ones.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 44
Now that a bulk of opcodes go through the new decoder, it is sensible
to do some cleanup. Go immediately through disas_insn_new and only jump
back after parsing the prefixes.
disas_insn() now only contains the three sigsetjmp cases, and they
are more easily managed if they are inlined into
These are unlikely to be converted to the table-based decoding
soon (perhaps there could be generic ESC decoding in decode-new.c.inc
for the Mod/RM byte, but not operand decoding), so keep them separate
from the remaining legacy-decoded instructions.
Acked-by: Richard Henderson
Signed-off-by:
Send all converted opcodes to disas_insn_new() directly from the big
decoding switch statement; once more, the debugging/bisecting logic
disappears.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/helper.h| 11 -
Split the bits that have some duplication with disas_insn_new, from
those that should be the main topic of the conversion. This is the
first step towards removing duplicate decoding of prefixes between
disas_insn and disas_insn_new.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
While keeping decode->immediate for convenience and for 4-operand instructions,
store the immediate in X86DecodedOp as well. This enables instructions
with more than one immediate such as ENTER. It can also be used for far
calls and jumps.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo
In the new decoder it is sometimes easier to put the segment
in T1 instead of T0, usually because another operand was loaded
by common code in T0. Genrealize gen_movl_seg_T0 to allow
using any source.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c
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