From: Philippe Mathieu-Daudé
Mechanical change running Coccinelle spatch with content
generated from the qom-cast-macro-clean-cocci-gen.py added
in the previous commit.
Suggested-by: Markus Armbruster
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20230601093452.38972-3-phi...@linaro.org>
The ipmi-bt-test uses "-device ipmi-bmc-extern", thus it should
only be run if this device has been enabled in the configuration.
Message-Id: <20230524081024.1619273-1-th...@redhat.com>
Signed-off-by: Thomas Huth
---
tests/qtest/meson.build | 3 ++-
1 file changed, 2 insertions(+), 1
From: Ilya Leoshkevich
Add a small test to prevent regressions.
Signed-off-by: Ilya Leoshkevich
Acked-by: Alex Bennée
Message-Id: <20230510230213.330134-3-...@linux.ibm.com>
Signed-off-by: Thomas Huth
---
tests/tcg/s390x/Makefile.target | 11 -
tests/tcg/s390x/gdbstub/test-svc.py |
Booting a Linux kernel with the malta machine is currently broken
on big endian hosts. The cpu_to_gt32 macro wants to byteswap a value
for little endian targets only, but uses the wrong way to do this:
cpu_to_[lb]e32 works the other way round on big endian hosts! Fix
it by using the same ways on
From: Ilya Leoshkevich
In qemu-user-s390x, /proc/cpuinfo contains:
processor 0: version = 00, identification = 00, machine = 8561
processor 1: version = 00, identification = 40, machine = 8561
The highest nibble is supposed to contain the CPU address, but it's off
From: Ilya Leoshkevich
Currently single-stepping SVC executes two instructions. The reason is
that EXCP_DEBUG for the SVC instruction itself is masked by EXCP_SVC.
Fix by re-raising EXCP_DEBUG.
Signed-off-by: Ilya Leoshkevich
Message-Id: <20230510230213.330134-2-...@linux.ibm.com>
From: Ilya Leoshkevich
LCBB is supposed to overwrite only the bottom 32 bits, but QEMU
erroneously overwrites the entire register.
Fixes: 6d9303322ed9 ("s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARY")
Cc: qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
Message-Id:
From: Ilya Leoshkevich
Add a small test to prevent regressions.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
Message-Id: <20230601223027.795501-3-...@linux.ibm.com>
Acked-by: David Hildenbrand
Signed-off-by: Thomas Huth
---
tests/tcg/s390x/mxdb.c | 30
From: Ilya Leoshkevich
It is required for implementing /proc/cpuinfo emulation.
Reviewed-by: David Hildenbrand
Signed-off-by: Ilya Leoshkevich
Message-Id: <20230605113950.1169228-3-...@linux.ibm.com>
Signed-off-by: Thomas Huth
---
linux-user/loader.h | 4
linux-user/elfload.c | 2 +-
From: Ilya Leoshkevich
It is required for implementing /proc/cpuinfo emulation.
Reviewed-by: David Hildenbrand
Signed-off-by: Ilya Leoshkevich
Message-Id: <20230605113950.1169228-4-...@linux.ibm.com>
Signed-off-by: Thomas Huth
---
linux-user/loader.h | 1 +
linux-user/elfload.c | 27
From: Ilya Leoshkevich
Add a test to prevent regressions.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
Message-Id: <20230526181240.1425579-3-...@linux.ibm.com>
Reviewed-by: David Hildenbrand
Acked-by: Richard Henderson
Signed-off-by: Thomas Huth
---
tests/tcg/s390x/lcbb.c
From: Max Fritz
This modification enables better control over the inclusion of libkeyutils
based on the configuration, enhancing the flexibility of the build system.
Signed-off-by: Max Fritz
Message-Id: <168471463402.18155.357535902742993996...@git.sr.ht>
Reviewed-by: Daniel P. Berrangé
From: Philippe Mathieu-Daudé
Add a script to generate Coccinelle semantic patch
removing all pointless QOM cast macro uses.
Suggested-by: Markus Armbruster
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20230601093452.38972-2-phi...@linaro.org>
Reviewed-by: Richard Henderson
From: Ilya Leoshkevich
Add a small test to prevent regressions.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Ilya Leoshkevich
Message-Id: <20230526181240.1425579-5-...@linux.ibm.com>
Reviewed-by: Richard Henderson
Reviewed-by: David Hildenbrand
Signed-off-by: Thomas Huth
---
Hi Richard!
The following changes since commit 848a6caa88b9f082c89c9b41afa975761262981d:
Merge tag 'migration-20230602-pull-request' of
https://gitlab.com/juan.quintela/qemu into staging (2023-06-02 17:33:29 -0700)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git
On 5/4/23 18:04, Philippe Mathieu-Daudé wrote:
All types used are forward-declared in "qemu/typedefs.h".
Signed-off-by: Philippe Mathieu-Daudé
---
include/sysemu/kvm.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index
On 6/6/23 01:50, ank...@nvidia.com wrote:
From: Ankit Agrawal
The GPU device memory is reported to the VM as a BAR. The device memory
may not be aligned to the power-of-2, but the QEMU expects the PCI BAR to
be. Align the reported device memory size to the next power-of-2 before
QEMU does an
On 6/6/23 01:50, ank...@nvidia.com wrote:
From: Ankit Agrawal
The guest VM adds the GPU memory as (upto 8) separate memory-less NUMA
nodes. ACPI SRAT need to thus insert proximity domains and tag them as
MEM_AFFINITY_HOTPLUGGABLE. The VM kernel can then parse the SRAT and
create NUMA nodes.
>-Original Message-
>From: Peter Xu
>Sent: Tuesday, June 6, 2023 2:42 AM
>To: Duan, Zhenzhong
>Cc: qemu-devel@nongnu.org; m...@redhat.com; jasow...@redhat.com;
>pbonz...@redhat.com; richard.hender...@linaro.org; edua...@habkost.net;
>marcel.apfelb...@gmail.com;
>-Original Message-
>From: Peter Xu
>Sent: Tuesday, June 6, 2023 2:39 AM
>To: Duan, Zhenzhong
>Cc: qemu-devel@nongnu.org; m...@redhat.com; jasow...@redhat.com;
>pbonz...@redhat.com; richard.hender...@linaro.org; edua...@habkost.net;
>marcel.apfelb...@gmail.com;
On Mon, Jun 5, 2023 at 10:22 PM Laurent Vivier wrote:
>
> Maximum value for tx_queue_size depends on the backend type.
> 1024 for vDPA/vhost-user, 256 for all the others.
>
> The value is returned by virtio_net_max_tx_queue_size() to set the
> parameter:
>
> n->net_conf.tx_queue_size =
On Sat, Jun 3, 2023 at 1:33 AM Eugenio Pérez wrote:
>
> QEMU does not emulate it so it must be disabled as long as the backend
> does not support it.
>
> Signed-off-by: Eugenio Pérez
Acked-by: Jason Wang
Thanks
> ---
> net/vhost-vdpa.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On Sat, Jun 3, 2023 at 1:35 AM Eugenio Pérez wrote:
>
> Bug introducing when refactoring. Otherway, the guest never received
> the used buffer.
>
> Fixes: be4278b65fc1 ("vdpa: extract vhost_vdpa_net_cvq_add from
> vhost_vdpa_net_handle_ctrl_avail")
> Signed-off-by: Eugenio Pérez
Acked-by:
From: Ankit Agrawal
To add the memory in the guest as NUMA nodes, it needs the PXM node index
and the total count of nodes associated with the memory. The range of
proximity domains are communicated to the VM as part of the guest ACPI
using the nvidia,gpu-mem-pxm-start and
From: Ankit Agrawal
The guest VM adds the GPU memory as (upto 8) separate memory-less NUMA
nodes. ACPI SRAT need to thus insert proximity domains and tag them as
MEM_AFFINITY_HOTPLUGGABLE. The VM kernel can then parse the SRAT and
create NUMA nodes.
Signed-off-by: Ankit Agrawal
---
From: Ankit Agrawal
The GPU device memory is reported to the VM as a BAR. The device memory
may not be aligned to the power-of-2, but the QEMU expects the PCI BAR to
be. Align the reported device memory size to the next power-of-2 before
QEMU does an mmap.
Signed-off-by: Ankit Agrawal
---
From: Ankit Agrawal
NVIDIA is building systems which allows the CPU to coherently access
GPU memory. This GPU device memory can be added and managed by the
kernel memory manager. The patch holds the required changes in QEMU
to expose this memory to the device assigned VMs.
The GPU device memory
From: Ankit Agrawal
The GPU memory is exposed as device BAR1 to the VM and is discovered
by QEMU through the VFIO_DEVICE_GET_REGION_INFO ioctl. QEMU performs
the mapping to it.
The GPU memory can be added in the VM as (upto 8) separate NUMA nodes.
To achieve this, QEMU inserts a series of the
On 2023/6/6 00:45, Himanshu Chauhan wrote:
On an address match, skip checking for default permissions and return error
based on access defined in PMP configuration.
v3 Changes:
o Removed explicit return of boolean value from comparision
of priv/allowed_priv
v2 Changes:
o Removed goto to
On Thu, Jun 1, 2023 at 9:46 AM Niklas Cassel wrote:
>
> From: Niklas Cassel
>
> For NCQ, PxCI is cleared on command queued successfully.
> For non-NCQ, PxCI is cleared on command completed successfully.
> Successfully means ERR_STAT, BUSY and DRQ are all cleared.
>
> A command that has ERR_STAT
We want to check the softmmu tlb availability, not
if we are targetting system emulation. Besides, this
code could be used by user emulation in the future.
Signed-off-by: Philippe Mathieu-Daudé
---
Based-on: <20230605222420.14776-1-phi...@linaro.org>
See also
On Tue, 30 May 2023 19:05:56 +0100
Joao Martins wrote:
> Include the number of dirty pages on the vfio_get_dirty_bitmap tracepoint.
> These are fetched from the newly added return value in
> cpu_physical_memory_set_dirty_lebitmap().
>
> Signed-off-by: Joao Martins
> Reviewed-by: Cédric Le
On 5/6/23 23:56, BALATON Zoltan wrote:
On Mon, 5 Jun 2023, Philippe Mathieu-Daudé wrote:
describes sys_icache_invalidate() as
"equivalent to sys_cache_control(kCacheFunctionPrepareForExecution)",
having kCacheFunctionPrepareForExecution defined as:
/* Prepare memory for execution. This
On 6/6/23 00:24, Philippe Mathieu-Daudé wrote:
Richard clarified my confusion with CONFIG_SOFTMMU from v1:
https://lore.kernel.org/qemu-devel/7913570a-8bf6-2ac9-6869-fab872737...@linaro.org/
This series tries to make it a bit more explicit by removing
mentions of CONFIG_SOFTMMU in non-TCG code.
Richard clarified my confusion with CONFIG_SOFTMMU from v1:
https://lore.kernel.org/qemu-devel/7913570a-8bf6-2ac9-6869-fab872737...@linaro.org/
This series tries to make it a bit more explicit by removing
mentions of CONFIG_SOFTMMU in non-TCG code.
We replace CONFIG_SOFTMMU by !CONFIG_USER_ONLY
We don't build any user emulation target for Tricore,
only the system emulation. No need to check for it as
it is always defined.
Signed-off-by: Philippe Mathieu-Daudé
---
target/tricore/helper.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/target/tricore/helper.c
Since we *might* have user emulation with softmmu,
replace the system emulation check by !user emulation one.
Invert some if() ladders for clarity.
Signed-off-by: Philippe Mathieu-Daudé
---
target/m68k/helper.h| 2 +-
target/m68k/cpu.c | 14 ++
target/m68k/helper.c|
Since we *might* have user emulation with softmmu,
replace the system emulation check by !user emulation one.
Invert some if() ladders for clarity.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/internal.h | 6 +++---
accel/tcg/cpu-exec.c | 4 ++--
2 files changed, 5 insertions(+), 5
Since we *might* have user emulation with softmmu,
use the clearer 'CONFIG_SYSTEM_ONLY' key to check
for system emulation.
Signed-off-by: Philippe Mathieu-Daudé
---
meson.build| 4 ++--
accel/qtest/meson.build| 2 +-
accel/stubs/meson.build| 2 +-
We use the CONFIG_USER_ONLY key to describe user emulation,
and the CONFIG_SOFTMMU key to describe system emulation. Alias
it as 'CONFIG_SYSTEM_ONLY' for parity with user emulation.
Signed-off-by: Philippe Mathieu-Daudé
---
meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git
Since we *might* have user emulation with softmmu,
replace the system emulation check by !user emulation one.
Signed-off-by: Philippe Mathieu-Daudé
---
target/ppc/cpu_init.c| 20 ++--
target/ppc/helper_regs.c | 6 ++
2 files changed, 12 insertions(+), 14 deletions(-)
We use the user_ss[] array to hold the user emulation sources,
and the softmmu_ss[] array to hold the system emulation ones.
Hold the latter in the 'system_ss[]' array for parity with user
emulation.
Mechanical change doing:
$ sed -i -e s/softmmu_ss/system_ss/g $(git grep -l softmmu_ss)
Since we *might* have user emulation with softmmu,
replace the system emulation check by !user emulation one.
Invert the #ifdef'ry in TCGCPUOps structure for clarity.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/core/cpu.h | 4 +-
include/hw/core/tcg-cpu-ops.h | 102
Since we *might* have user emulation with softmmu,
replace the system emulation check by !user emulation one.
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/tcg/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/tcg/translate.c
On Tue, 23 May 2023, Alex Bennée wrote:
Richard Henderson writes:
On 5/22/23 15:26, BALATON Zoltan wrote:
On Mon, 22 May 2023, Alex Bennée wrote:
(ajb: add Richard for his compiler-fu)
BALATON Zoltan writes:
On Mon, 22 May 2023, Alex Bennée wrote:
BALATON Zoltan writes:
The low level
On Tue, 30 May 2023 17:48:14 +0300
Avihai Horon wrote:
> Implement switchover ack logic. This prevents the source from stopping
> the VM and completing the migration until an ACK is received from the
> destination that it's OK to do so.
>
> To achieve this, a new SaveVMHandlers handler
n Sun, 28 May 2023, BALATON Zoltan wrote:
On pegasos2 which has ACPI as part of VT8231 south bridge the board
firmware writes PM control register by accessing the second byte so
addr will be 1. This wasn't handled correctly and the write went to
addr 0 instead. This fixes ACPI shutdown with
On Mon, 5 Jun 2023, Philippe Mathieu-Daudé wrote:
describes sys_icache_invalidate() as
"equivalent to sys_cache_control(kCacheFunctionPrepareForExecution)",
having kCacheFunctionPrepareForExecution defined as:
/* Prepare memory for execution. This should be called
* after writing machine
We don't emulate the gigabit ethernet part of the chip but the MorphOS
driver accesses these and expects to get some valid looking result
otherwise it hangs. Add some minimal dummy implementation to avoid rhis.
Signed-off-by: BALATON Zoltan
---
This is only used by MorphOS on pegasos2 so most
In preparation for subsequent code to upgrade default SMBIOS
entry point type. There is no functional change.
Signed-off-by: Suravee Suthikulpanit
---
hw/i386/pc.c | 12
hw/i386/pc_piix.c | 9 -
hw/i386/pc_q35.c | 8
3 files changed, 12 insertions(+), 17
In order to support large number of vcpus, a newer 64-bit SMBIOS
entry point type is needed. Therefore, upgrade the default SMBIOS version
for PC machines to SMBIOS 3.0 for newer systems. Then increase the maximum
number of vCPUs for Q35 models to 1024, which is the limit for KVM.
Changes from
Michael,
On 6/4/2023 7:55 PM, Michael S. Tsirkin wrote:
On Fri, Jun 02, 2023 at 10:22:54PM -0500, Suravee Suthikulpanit wrote:
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -199,6 +199,14 @@ static void pc_q35_init(MachineState *machine)
pc_guest_info_init(pcms);
if
Currently, pc-q35 and pc-i44fx machine models are default to use SMBIOS 2.8
(32-bit entry point). Since SMBIOS 3.0 (64-bit entry point) is now fully
supported since QEMU 7.0, default to use SMBIOS 3.0 for newer machine
models. This is necessary to avoid the following message when launching
a VM
Since KVM_MAX_VCPUS is currently defined to 1024 for x86 as shown in
arch/x86/include/asm/kvm_host.h, update QEMU limits to the same number.
In case KVM could not support the specified number of vcpus, QEMU would
return the following error message:
qemu-system-x86_64: kvm_init_vcpu:
On 6/5/23 13:29, Philippe Mathieu-Daudé wrote:
On 3/6/23 05:49, Richard Henderson wrote:
On 6/2/23 15:58, Philippe Mathieu-Daudé wrote:
CONFIG_USER_ONLY is the opposite of CONFIG_SOFTMMU.
Replace !CONFIG_SOFTMMU negation by the positive form
which is clearer when reviewing code.
/rth7680/qemu.git tags/pull-tcg-20230605
for you to fetch changes up to a7f6911c127b1dd1b8764e03b0ebcf0a227a15e4:
tcg/tcg-op-vec: Remove left over _link_error() definitions (2023-06-05
12:20:16 -0700)
Build tcg/ once for system
On 3/6/23 05:49, Richard Henderson wrote:
On 6/2/23 15:58, Philippe Mathieu-Daudé wrote:
CONFIG_USER_ONLY is the opposite of CONFIG_SOFTMMU.
Replace !CONFIG_SOFTMMU negation by the positive form
which is clearer when reviewing code.
CONFIG_SOFTMMU should be reserved for the actual softmmu
From: Ilya Leoshkevich
Coverity complains that perf_marker is never unmapped.
Fix by unmapping it in perf_exit().
Fixes: Coverity CID 1507929
Fixes: 5584e2dbe8c9 ("tcg: add perfmap and jitdump")
Signed-off-by: Ilya Leoshkevich
Message-Id: <20230605114134.1169974-1-...@linux.ibm.com>
Create helper-gen-common.h without the target specific portion.
Use that in tcg-op-common.h. Reorg headers in target/arm to
ensure that helper-gen.h is included before helper-info.c.inc.
All other targets are already correct in this regard.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by:
Make tcg_gen_callN a static function. Create tcg_gen_call[0-7]
functions for use by helper-gen.h.inc.
Removes a multiplicty of calls to __stack_chk_fail, saving up
to 143kiB of .text space as measured on an x86_64 host.
Old New Less%Change
680 8741816 146864 1.65%
All uses replaced with TCGContext.addr_type.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/sparc64/tcg-target.c.inc | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index
The only usage of gen_tb_start and gen_tb_end are here.
Move the static icount_start_insn variable into a local
within translator_loop. Simplify the two subroutines
by passing in the existing local cflags variable.
Leave only the declaration of gen_io_start in gen-icount.h.
Reviewed-by:
Create tcg/tcg-op-common.h, moving everything that does not concern
TARGET_LONG_BITS or TCGv. Adjust tcg/*.c to use the new header
instead of tcg-op.h, in preparation for compiling tcg/ only once.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
This replaces of TCG_GUEST_DEFAULT_MO in tcg-op-ldst.c.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 1 +
accel/tcg/translate-all.c | 5 +
tcg/tcg-op-ldst.c | 4 +---
3 files changed, 7 insertions(+), 3 deletions(-)
diff
The last use was removed with 2ac01d6dafab.
Fixes: 2ac01d6dafab ("translate-all: use a binary search tree to track TBs in
TBContext")
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 10 --
1 file changed, 10 deletions(-)
diff --git
This function is only used in translator.c, and uses a
target-specific typedef: abi_ptr.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/plugin-gen.h | 22 --
accel/tcg/translator.c| 21 +
2 files changed, 21
Since the change to CPUArchState, we have a common typedef
that can always be used.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/helper-head.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/exec/helper-head.h
From: Philippe Mathieu-Daudé
In commit d56fea79f9 ("tcg: Move TCG_{LOW,HIGH} to tcg-internal.h")
we replaced the "_link_error" definitions with modern QEMU_ERROR()
attribute markup. We covered tcg-op.c but forgot to completely
clean tcg-op-vec.c. Do it now.
Signed-off-by: Philippe Mathieu-Daudé
This is all that is required by tcg/ from exec-all.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 132 +--
include/exec/translation-block.h | 149 +++
tcg/tcg-op-ldst.c
This makes TranslationBlock agnostic to the address size of the guest.
Use vaddr for pc, since that's always a virtual address.
Use uint64_t for cs_base, since usage varies between guests.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 4 ++--
Reduce the header to only bswap.h and cpu_ldst.h.
Move exec/translate-all.h to translator.c.
Reduce tcg.h and tcg-op.h to tcg-op-common.h.
Remove otherwise unused headers.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/translator.h | 6 +-
This had been included via tcg-op-common.h via tcg-op.h,
but that is going away.
It is needed for inlines within translator.h, so we might as well
do it there and not individually in each translator c file.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
Hi Patrick,
On 31/5/23 18:34, Patrick Venture wrote:
On Wed, Mar 22, 2023 at 2:40 PM Philippe Mathieu-Daudé
mailto:phi...@linaro.org>> wrote:
On 22/3/23 22:19, Corey Minyard wrote:
> On Wed, Mar 22, 2023 at 10:21:36AM -0700, Patrick Venture wrote:
>> This allows the devices
This had been included via tcg-op-common.h via tcg-op.h,
but that is going away. In idef-parser.y, shuffle some
tcg related includes into a more logical order.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/hexagon/genptr.c | 1 +
Move most includes from *translate*.c to translate.h, ensuring
that we get the ordering correct. Ensure cpu.h is first.
Use disas/disas.h instead of exec/log.h.
Drop otherwise unused includes.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/mips/tcg/translate.h
This had been pulled in via exec/translator.h,
but the include of exec-all.h will be removed.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/arm/tcg/translate.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/tcg/translate.h
If CONFIG_USER_ONLY is ok generically, so is CONFIG_SOFTMMU,
because they are exactly opposite.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/poison.h | 1 -
scripts/make-config-poison.sh | 5 +++--
2 files changed, 3 insertions(+), 3
This is used by exactly one host in extraordinary circumstances.
This means that translator.h need not include plugin-gen.h;
translator.c already includes plugin-gen.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/translator.h | 8 +---
Create helper-proto-common.h without the target specific portion.
Use that in tcg-op-common.h. Include helper-proto.h in target/arm
and target/hexagon before helper-info.c.inc; all other targets are
already correct in this regard.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard
Two headers are not required for the rest of the
contents of plugin-gen.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/plugin-gen.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/exec/plugin-gen.h b/include/exec/plugin-gen.h
index
This finally paves the way for tcg/ to be built once per mode.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 1 -
accel/tcg/plugin-gen.c | 1 +
tcg/region.c | 2 +-
tcg/tcg-op.c | 2 +-
tcg/tcg.c | 2 +-
5
Create two static libraries for use by each execution mode.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/meson.build | 30 +++---
1 file changed, 27 insertions(+), 3 deletions(-)
diff --git a/tcg/meson.build b/tcg/meson.build
index
This had been pulled in from exec/cpu_ldst.h, via exec/exec-all.h,
but the include of tcg.h will be removed.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
accel/tcg/monitor.c | 1 +
accel/tcg/tcg-accel-ops-mttcg.c | 2 +-
accel/tcg/tcg-accel-ops-rr.c|
Removes a multiplicity of calls to __assert_fail, saving up
to 360kiB of .text space as measured on an x86_64 host.
Old New Less%Change
9257272 680 368592 3.98% qemu-system-aarch64
6100968 5911832 189136 3.10% qemu-system-riscv64
5839112 5707032 132080 2.26%
Fixes an assert in tcg_gen_code that we don't accidentally
eliminate an insn_start during optimization.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/sh4/translate.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git
The symbol is always defined, even if to 0. We wanted to test for
TCG_OVERSIZED_GUEST == 0.
This fixed, the #error is reached while building arm-softmmu, because
TCG_OVERSIZED_GUEST is not true (nor supposed to be true) for arm32
guest on a 32-bit host. But that's ok, because this feature
New wrapper around gen_io_start which takes care of the USE_ICOUNT
check, as well as marking the DisasContext to end the TB.
Remove exec/gen-icount.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
MAINTAINERS | 1 -
This had been pulled in from tcg/tcg.h, via exec/cpu_ldst.h,
via exec/exec-all.h, but the include of tcg.h will be removed.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/avr/helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/avr/helper.c
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/helper-head.h | 18 +++---
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/include/exec/helper-head.h b/include/exec/helper-head.h
index f863a6ef5d..a355ef8ebe 100644
---
This is a step toward making TranslationBlock agnostic
to the address size of the guest.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/exec-all.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/exec/exec-all.h
This had been pulled in via exec/exec-all.h, via exec/translator.h,
but the include of exec-all.h will be removed.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/hexagon/translate.c | 1 +
target/loongarch/translate.c | 3 +--
target/mips/tcg/translate.c | 1
The following changes since commit b52daaf2c868f2bab102eb5acbf55b2917f46aea:
Merge tag 'pull-block-2023-06-05' of https://gitlab.com/hreitz/qemu into
staging (2023-06-05 10:27:31 -0700)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20230605
Create tcg/tcg-op-gvec-common.h, moving everything that does not
concern TARGET_LONG_BITS. Adjust tcg-op-gvec.c to use the new header.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/tcg/tcg-op-gvec-common.h | 426 +
All uses replaced with TCGContext.addr_type.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/s390x/tcg-target.c.inc | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index
This will enable replacement of TARGET_INSN_START_WORDS in tcg.c.
Split out "tcg/insn-start-words.h" and use it in target/.
Reviewed-by: Anton Johansson
Signed-off-by: Richard Henderson
---
include/tcg/insn-start-words.h | 17 +
include/tcg/tcg-op.h | 8
The bug was hidden because they happen to have the same values.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/region.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/tcg/region.c b/tcg/region.c
index bef4c4756f..f8410ba5db
In preparation for compiling tcg/ only once, eliminate
the all_helpers array. Instantiate the info structs for
the generic helpers in accel/tcg/, and the structs for
the target-specific helpers in each translate.c.
Since we don't see all of the info structs at startup,
initialize at first use,
Disconnect the layout of ArchCPU from TCG compilation.
Pass the relative offset of 'env' and 'neg.tlb.f' as a parameter.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h | 39 +-
include/exec/tlb-common.h| 56
The replacement isn't ideal, as the raw count of bits
is not easily synced with exec/cpu-all.h, but it does
remove from tcg.h the target dependency on TARGET_PAGE_BITS_MIN
which is built into TLB_FLAGS_MASK.
Reviewed-by: Anton Johansson
Signed-off-by: Richard Henderson
---
This makes CPUTLBEntry agnostic to the address size of the guest.
When 32-bit addresses are in effect, we can simply read the low
32 bits of the 64-bit field. Similarly when we need to update
the field for setting TLB_NOTDIRTY.
For TCG backends that could in theory be big-endian, but in
practice
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