[PATCH v3 5/6] util/async-teardown: Use qemu_close_range() to close fds

From: Zhangjin Wu Based on the old close_all_open_fd() of util/async-teardown.c, a new generic qemu_close_range() has been added in osdep.c. Now, let's switch over to use the generic qemu_close_range(). Signed-off-by: Zhangjin Wu Signed-off-by: Bin Meng --- Changes in v3: - limit the

[PATCH v3 0/6] net/tap: Fix QEMU frozen issue when the maximum number of file descriptors is very large

Current codes using a brute-force traversal of all file descriptors do not scale on a system where the maximum number of file descriptors is set to a very large value (e.g.: in a Docker container of Manjaro distribution it is set to 1073741816). QEMU just looks frozen during start-up. The

[PATCH v3 4/6] util/osdep: Introduce qemu_close_range()

This introduces a new QEMU API qemu_close_range() that closes all open file descriptors from first to last (included). This API will try a more efficient call to close_range(), or walk through of /proc/self/fd whenever these are possible, otherwise it falls back to a plain close loop.

[PATCH v3 6/6] net: tap: Use qemu_close_range() to close fds

From: Zhangjin Wu Current codes using a brute-force traversal of all file descriptors do not scale on a system where the maximum number of file descriptors is set to a very large value (e.g.: in a Docker container of Manjaro distribution it is set to 1073741816). QEMU just looks frozen during

[PATCH v3 3/6] util/async-teardown: Fall back to close fds one by one

When opening /proc/self/fd fails, current codes just return directly, but we can fall back to close fds one by one. Signed-off-by: Bin Meng --- (no changes since v2) Changes in v2: - new patch: "util/async-teardown: Fall back to close fds one by one" util/async-teardown.c | 6 +- 1 file

[PATCH v3 2/6] tests/tcg/cris: Correct the off-by-one error

sysconf(_SC_OPEN_MAX) returns the maximum number of files that a process can have open at any time, which means the fd should not be larger than or equal to the return value. Signed-off-by: Bin Meng --- (no changes since v2) Changes in v2: - new patch: "tests/tcg/cris: Correct the off-by-one

[PATCH v3 1/6] tests/tcg/cris: Fix the coding style

The code style does not conform with QEMU's. Correct it so that the upcoming commit does not trigger checkpatch warnings. Signed-off-by: Bin Meng --- (no changes since v2) Changes in v2: - new patch: "tests/tcg/cris: Fix the coding style" tests/tcg/cris/libc/check_openpf5.c | 57

Re: [PATCH v2] hw/arm/xlnx: Connect secondary CGEM IRQs

On [2023 Jun 16] Fri 09:38:03, Kinsey Moore wrote: > The Cadence GEM peripherals as configured for Zynq MPSoC and Versal > platforms have two priority queues with separate interrupt sources for > each. If the interrupt source for the second priority queue is not > connected, they work in polling

Re: [PATCH v4 15/24] nbd/server: Prepare to send extended header replies

On 08.06.23 16:56, Eric Blake wrote: Although extended mode is not yet enabled, once we do turn it on, we need to reply with extended headers to all messages. Update the low level entry points necessary so that all other callers automatically get the right header based on the current mode.

Re: [PATCH v4 14/24] nbd/server: Prepare to receive extended header requests

On 08.06.23 16:56, Eric Blake wrote: Although extended mode is not yet enabled, once we do turn it on, we need to accept extended requests for all messages. Previous patches have already taken care of supporting 64-bit lengths, now we just need to read it off the wire. Note that this

Re: [Libguestfs] [PATCH v4 13/24] nbd/server: Refactor handling of request payload

On 08.06.23 21:29, Eric Blake wrote: On Thu, Jun 08, 2023 at 08:56:42AM -0500, Eric Blake wrote: Upcoming additions to support NBD 64-bit effect lengths allow for the possibility to distinguish between payload length (capped at 32M) and effect length (up to 63 bits). Without that extension,

Re: [RFC PATCH 00/19] hugetlb support for KVM guest_mem

On 06/06/23 19:03, Ackerley Tng wrote: > Hello, > > This patchset builds upon a soon-to-be-published WIP patchset that Sean > published at https://github.com/sean-jc/linux/tree/x86/kvm_gmem_solo, > mentioned > at [1]. > > The tree can be found at: >

Re: [PATCH v4 12/24] nbd: Prepare for 64-bit request effect lengths

On 08.06.23 16:56, Eric Blake wrote: Widen the length field of NBDRequest to 64-bits, although we can assert that all current uses are still under 32 bits, because nothing ever puts us into NBD_MODE_EXTENDED yet. Thus no semantic change. No semantic change yet. Signed-off-by: Eric Blake

Re: A confusion about CXL in arm virt machine

On Fri, Jun 16, 2023 at 03:43:31PM +0800, Yuquan Wang wrote: > Hi, Gregory > > There is one confusion about CXL in QEMU I hope to consult. > If you have some time to look at this email, I would have better > understanding of CXL > emulation in QEMU. > > On docs/system/devices/cxl.rst ,

Re: [PATCH] vfio/migration: Fix return value of vfio_migration_realize()

On 16/06/2023 15:04, Cédric Le Goater wrote: > On 6/16/23 12:12, Joao Martins wrote: >> On 16/06/2023 10:53, Duan, Zhenzhong wrote: -Original Message- From: Joao Martins Sent: Friday, June 16, 2023 5:06 PM To: Duan, Zhenzhong Cc: alex.william...@redhat.com;

[PATCH 0/1] hw/riscv/virt.c: check for 'ssaia' with KVM AIA

Hi, This patch was inspired by my review and testing of the QEMU KVM AIA work. It's not dependent on it though, and can be reviewed and merged separately. You'll need "[PATCH v2 00/18] target/riscv, KVM: fixes and enhancements" for this check to work properly. Otherwise the host value won't be

[PATCH 1/1] hw/riscv/virt.c: check for 'ssaia' with KVM AIA

KVM AIA relies on ext_ssaia support present in the host. At this moment we're not checking. A KVM guest is doomed to hung if we use any 'aia' option, aside from 'aia=none', and KVM does not support 'ssaia'. Add a check for it. The placement is intentional: we need to check before

[PATCH v2 5/6] util/async-teardown: Use qemu_close_range() to close fds

From: Zhangjin Wu Based on the old close_all_open_fd() of util/async-teardown.c, a new generic qemu_close_range() has been added in osdep.c. Now, let's switch over to use the generic qemu_close_range(). Signed-off-by: Zhangjin Wu Signed-off-by: Bin Meng --- (no changes since v1)

[PATCH v2 4/8] target/tricore: Indirect jump insns use tcg_gen_lookup_and_goto_ptr()

Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 6164ba6539..5515dfa3f3 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c

[PATCH v2 3/8] target/tricore: ENABLE/DISABLE exit to main-loop

so we can recognize exceptions after re-enabling interrupts. Reported-by: Richard Henderson Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index

[PATCH v2 6/6] net: tap: Use qemu_close_range() to close fds

From: Zhangjin Wu Current codes using a brute-force traversal of all file descriptors do not scale on a system where the maximum number of file descriptors is set to a very large value (e.g.: in a Docker container of Manjaro distribution it is set to 1073741816). QEMU just looks frozen during

[PATCH v2 0/6] net/tap: Fix QEMU frozen issue when the maximum number of file descriptors is very large

Current codes using a brute-force traversal of all file descriptors do not scale on a system where the maximum number of file descriptors is set to a very large value (e.g.: in a Docker container of Manjaro distribution it is set to 1073741816). QEMU just looks frozen during start-up. The

[PATCH v2 1/6] tests/tcg/cris: Fix the coding style

The code style does not conform with QEMU's. Correct it so that the upcoming commit does not trigger checkpatch warnings. Signed-off-by: Bin Meng --- (no changes since v1) tests/tcg/cris/libc/check_openpf5.c | 57 ++--- 1 file changed, 27 insertions(+), 30 deletions(-)

[PATCH v2 1/8] target/tricore: Fix RR_JLI clobbering reg A[11]

if A[r1] == A[11], then we would overwrite the destination address of the jump with the return address. Reported-by: Richard Henderson Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/tricore/translate.c

[PATCH v2 8/8] target/tricore: Fix ICR.IE offset in RESTORE insn

from ISA v1.6.1 onwards the bit position of ICR.IE changed. ctx->icr_ie_offset contains the correct value for the ISA version used by the vCPU. Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 3 ++- 1 file changed, 2 insertions(+), 1

[PATCH v2 5/8] target/tricore: Introduce priv tb flag

Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann --- v1 -> v2: - Removed (uint32_t) cast target/tricore/cpu.h | 17 - target/tricore/translate.c | 14 -- 2 files changed, 20 insertions(+), 11 deletions(-) diff --git a/target/tricore/cpu.h

[PATCH v2 3/6] util/async-teardown: Fall back to close fds one by one

When opening /proc/self/fd fails, current codes just return directly, but we can fall back to close fds one by one. Signed-off-by: Bin Meng --- (no changes since v1) util/async-teardown.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/util/async-teardown.c

[PATCH v2 7/8] target/tricore: Honour privilege changes on PSW write

the CPU can change the privilege level by writing the corresponding bits in PSW. If this happens all instructions after this 'mtcr' in the TB are translated with the wrong privilege level. So we have to exit to the cpu_loop() and start translating again with the new privilege level.

[PATCH v2 6/8] target/tricore: Implement privilege level for all insns

Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 47 -- 1 file changed, 35 insertions(+), 12 deletions(-) diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 44f1c1022f..71e3842601

[PATCH v2 2/6] tests/tcg/cris: Correct the off-by-one error

sysconf(_SC_OPEN_MAX) returns the maximum number of files that a process can have open at any time, which means the fd should not be larger than or equal to the return value. Signed-off-by: Bin Meng --- (no changes since v1) tests/tcg/cris/libc/check_openpf5.c | 4 ++-- 1 file changed, 2

[PATCH v2 4/6] utils/osdep: Introduce qemu_close_range()

This introduces a new QEMU API qemu_close_range() that closes all open file descriptors from first to last (included). This API will try a more efficient call to close_range(), or walk through of /proc/self/fd whenever these are possible, otherwise it falls back to a plain close loop.

[PATCH v2 0/8] TriCore Privilege Levels

Hi, this patch series tries to properly implement privilege levels for the TriCore, as discussed in https://lore.kernel.org/qemu-devel/20230118090319.32n4uto7ogy3gfr6@schnipp.zuhause/. While implementing privilege traps for the SV/UM1 only insns, I saw that the RESTORE insn uses the wrong ICR.IE

[PATCH v2 2/8] target/tricore: Introduce DISAS_TARGET_EXIT

this replaces all calls to tcg_gen_exit_tb() and moves them to tricore_tb_stop(). Signed-off-by: Bastian Koppelmann --- target/tricore/translate.c | 25 - 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/target/tricore/translate.c

Re: [PATCH 07/10] pc-bios/s390-ccw: always build network bootloader

On Mon, 2023-06-05 at 11:52 +0200, Paolo Bonzini wrote: > In the beginning, the network bootloader was considered experimental and > thus optional, but it is well established nowadays and configure always > checks for roms/SLOF before compiling pc-bios/s390-ccw. Only if run in a git repository,

Re: [PATCH v3 00/19] Add RISC-V vector cryptographic instruction set support

Hi Daniel, I'm Max Chou from SiFive, one of the authors of this patchset. I'll take over to update this patchset to the v20230531 version of the RISC-V vector cryptography specification and take the comments from Weiwei Li into consideration. Then I'll re-send, rebased on top of Alistair's

Re: [PATCH 05/12] hw/virtio: Add support for apple virtio-blk

On Fri, Jun 16, 2023 at 01:48:51PM +0200, Kevin Wolf wrote: > Am 15.06.2023 um 00:56 hat Alexander Graf geschrieben: > > Apple has its own virtio-blk PCI device ID where it deviates from the > > official virtio-pci spec slightly: It puts a new "apple type" > > field at a static offset in config

[PATCH v2] hw/arm/xlnx: Connect secondary CGEM IRQs

The Cadence GEM peripherals as configured for Zynq MPSoC and Versal platforms have two priority queues with separate interrupt sources for each. If the interrupt source for the second priority queue is not connected, they work in polling mode only. This change connects the second interrupt source

Re: [PATCH 05/12] hw/virtio: Add support for apple virtio-blk

On 16/6/23 13:48, Kevin Wolf wrote: Am 15.06.2023 um 00:56 hat Alexander Graf geschrieben: Apple has its own virtio-blk PCI device ID where it deviates from the official virtio-pci spec slightly: It puts a new "apple type" field at a static offset in config space and introduces a new discard

RE: [PATCH] hw/arm/xlnx: Connect secondary CGEM IRQs

Thanks for the review. I'll get this updated and sent back out as soon as I've tested it. Kinsey -Original Message- From: Francisco Iglesias Sent: Friday, June 16, 2023 3:28 AM To: Kinsey Moore Cc: qemu-devel@nongnu.org Subject: Re: [PATCH] hw/arm/xlnx: Connect secondary CGEM IRQs

[PATCH] Add support for RAPL MSRs in KVM/Qemu

Starting with the "Sandy Bridge" generation, Intel CPUs provide a RAPL interface (Running Average Power Limit) for advertising the accumulated energy consumption of various power domains (e.g. CPU packages, DRAM, etc.). The consumption is reported via MSRs (model specific registers) like

Re: [PATCH] vfio/migration: Fix return value of vfio_migration_realize()

On 6/16/23 12:12, Joao Martins wrote: On 16/06/2023 10:53, Duan, Zhenzhong wrote: -Original Message- From: Joao Martins Sent: Friday, June 16, 2023 5:06 PM To: Duan, Zhenzhong Cc: alex.william...@redhat.com; c...@redhat.com; qemu-devel@nongnu.org; Peng, Chao P Subject: Re: [PATCH]

Re: [PATCH 10/12] hw/vmapple/cfg: Introduce vmapple cfg region

On 15/6/23 00:57, Alexander Graf wrote: Instead of device tree or other more standardized means, VMApple passes platform configuration to the first stage boot loader in a binary encoded format that resides at a dedicated RAM region in physical address space. This patch models this configuration

Re: [PATCH 09/12] hw/vmapple/bdif: Introduce vmapple backdoor interface

On 15/6/23 00:56, Alexander Graf wrote: The VMApple machine exposes AUX and ROOT block devices (as well as USB OTG emulation) via virtio-pci as well as a special, simple backdoor platform device. This patch implements this backdoor platform device to the best of my understanding. I left out any

Re: [PATCH 02/12] hw/misc/pvpanic: Add MMIO interface

On 15/6/23 00:40, Alexander Graf wrote: In addition to the ISA and PCI variants of pvpanic, let's add an MMIO platform device that we can use in embedded arm environments. Signed-off-by: Alexander Graf --- hw/misc/Kconfig | 4 +++ hw/misc/meson.build | 1 +

Re: [PATCH 04/12] hvf: arm: Ignore writes to CNTP_CTL_EL0

On 15/6/23 00:54, Alexander Graf wrote: MacOS unconditionally disables interrupts of the physical timer on boot and then continues to use the virtual one. We don't really want to support a full physical timer emulation, so let's just ignore those writes. Signed-off-by: Alexander Graf ---

Re: [PATCH 03/12] hvf: Increase number of possible memory slots

On 15/6/23 00:40, Alexander Graf wrote: For PVG we will need more than the current 32 possible memory slots. Bump the limit to 512 instead. Signed-off-by: Alexander Graf --- accel/hvf/hvf-accel-ops.c | 2 +- include/sysemu/hvf_int.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)

[qemu-web PATCH] include Dockerfile used to proxy qemu.org to gitlab.io

The server configuration used to actually publish qemu-web.git to qemu.org together with the sphinx documentation, right now, is hidden in the machine that runs qemu.org. Include it in the qemu-web.git website for documentation purpose, in the format of a Dockerfile that you can use to run your

Re: [PATCH] elf2dmp: Don't abandon when Prcb is set to 0

> On 2023/06/12 12:42, Viktor Prutyanov wrote: > >>> Prcb may be set to 0 for some CPUs if the dump was taken before they >>> start. The dump may still contain valuable information for started CPUs >>> so don't abandon conversion in such a case. >>> >>> Signed-off-by: Akihiko Odaki >>> ---

Re: [PATCH 05/12] hw/virtio: Add support for apple virtio-blk

Am 15.06.2023 um 00:56 hat Alexander Graf geschrieben: > Apple has its own virtio-blk PCI device ID where it deviates from the > official virtio-pci spec slightly: It puts a new "apple type" > field at a static offset in config space and introduces a new discard > command. In other words, it's a

Re: [PULL 0/6] aspeed queue

On 6/15/23 19:35, Cédric Le Goater wrote: The following changes since commit 7efd65423ab22e6f5890ca08ae40c84d6660242f: Merge tag 'pull-riscv-to-apply-20230614' ofhttps://github.com/alistair23/qemu into staging (2023-06-14 05:28:51 +0200) are available in the Git repository at:

Re: [PATCH] vfio/migration: Fix return value of vfio_migration_realize()

On 16/06/2023 10:53, Duan, Zhenzhong wrote: >> -Original Message- >> From: Joao Martins >> Sent: Friday, June 16, 2023 5:06 PM >> To: Duan, Zhenzhong >> Cc: alex.william...@redhat.com; c...@redhat.com; qemu-devel@nongnu.org; >> Peng, Chao P >> Subject: Re: [PATCH] vfio/migration: Fix

[PULL 3/5] hw/loongarch: Add numa support

From: Tianrui Zhao 1. Implement some functions for LoongArch numa support; 2. Implement fdt_add_memory_node() for fdt; 3. build_srat() fills node_id and adds build numa memory. Reviewed-by: Song Gao Signed-off-by: Tianrui Zhao Signed-off-by: Song Gao Message-Id:

[PULL 0/5] loongarch-to-apply queue

-loongarch-20230616 for you to fetch changes up to 505aa8d8f29b79fcef77563bb4124208badbd8d4: target/loongarch: Fix CSR.DMW0-3.VSEG check (2023-06-16 17:58:46 +0800) pull-loongarch-20230616 * Fix CSR.DMW0-3.VSEG check * Add cpu arch_id

[PULL 1/5] hw/loongarch/virt: Add cpu arch_id support

From: Tianrui Zhao With acpi madt table, there is cpu physical coreid, which may be different with logical id in qemu. This patch adds cpu arch_id support, and fill madt table with arch_id. For the present cpu arch_id is still equal to logical id. Reviewed-by: Song Gao Signed-off-by: Tianrui

[PULL 4/5] hw/loongarch: Supplement cpu topology arguments

From: Tianrui Zhao Supplement LoongArch cpu topology arguments, including support socket and threads per core. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Song Gao Signed-off-by: Tianrui Zhao Signed-off-by: Song Gao Message-Id: <20230613123251.2471878-1-zhaotian...@loongson.cn> ---

[PULL 5/5] target/loongarch: Fix CSR.DMW0-3.VSEG check

From: Jiajie Chen The previous code checks whether the highest 16 bits of virtual address equal to that of CSR.DMW0-3. This is incorrect according to the spec, and is corrected to compare only the highest four bits instead. Signed-off-by: Jiajie Chen Reviewed-by: Song Gao Message-Id:

[PULL 2/5] hw/intc: Set physical cpuid route for LoongArch ipi device

From: Tianrui Zhao LoongArch ipi device uses physical cpuid to route to different vcpus rather logical cpuid, and the physical cpuid is the same with cpuid in acpi dsdt and srat table. Reviewed-by: Song Gao Signed-off-by: Tianrui Zhao Signed-off-by: Song Gao Message-Id:

RE: [PATCH] vfio/migration: Fix return value of vfio_migration_realize()

>-Original Message- >From: Joao Martins >Sent: Friday, June 16, 2023 5:06 PM >To: Duan, Zhenzhong >Cc: alex.william...@redhat.com; c...@redhat.com; qemu-devel@nongnu.org; >Peng, Chao P >Subject: Re: [PATCH] vfio/migration: Fix return value of >vfio_migration_realize() > >On

Re: [PATCH v4 1/6] target/ppc: Fix instruction loading endianness in alignment interrupt

On 6/15/23 08:21, Nicholas Piggin wrote: On Wed Jun 14, 2023 at 3:51 PM AEST, Anushree Mathur wrote: On 5/30/23 18:55, Nicholas Piggin wrote: powerpc ifetch endianness depends on MSR[LE] so it has to byteswap after cpu_ldl_code(). This corrects DSISR bits in alignment interrupts when running

Re: [PATCH v5 0/9] migration: Add switchover ack capability and VFIO precopy support

Tested-by: YangHang Liu On Wed, May 31, 2023 at 1:01 AM Avihai Horon wrote: > > Hello everyone, > > This is v5 of the switchover ack series. > > Changes from v4 [6]: > * Removed superfluous '"' in vfio_save_iterate() trace. (Cedric) > * Removed VFIOMigration->switchover_ack_needed and computed

[PATCH v1 13/15] virtio-mem: Expose device memory via multiple memslots if enabled

Having large virtio-mem devices that only expose little memory to a VM is currently a problem: we map the whole sparse memory region into the guest using a single memslot, resulting in one gigantic memslot in KVM. KVM allocates metadata for the whole memslot, which can result in quite some memory

[PATCH v1 07/15] memory-device: Support memory devices that statically consume multiple memslots

We want to support memory devices that have a memory region container as device memory region where they statically map multiple RAM memory regions. We already have one device that uses a container as device memory region: NVDIMMs. However, a NVDIMM always ends up consuming exactly one memslot.

[PATCH v1 15/15] virtio-mem: Mark memslot alias memory regions unmergeable

Let's mark the memslot alias memory regions as unmergable, such that flatview and vhost won't merge adjacent memory region aliases and we can atomically map/unmap individual aliases without affecting adjacent alias memory regions. This fixes issues with vhost and vfio (which do not support atomic

[PATCH v1 09/15] memory-device, vhost: Support memory devices that dynamically consume multiple memslots

We want to support memory devices that have a dynamically managed memory region container as device memory region. This device memory region maps multiple RAM memory subregions (e.g., aliases to the same RAM memory region), whereby these subregions can be (un)mapped on demand. Each RAM subregion

[PATCH v1 04/15] memory-device, vhost: Add a memslot soft limit for memory devices

While we properly check before plugging a memory device whether there still is a free memslot, we have other memslot consumers (such as boot memory, PCI BARs) that don't perform any checks and might dynamically consume memslots without any prior reservation. So we might succeed in plugging a

[PATCH v1 14/15] memory, vhost: Allow for marking memory device memory regions unmergeable

Let's allow for marking memory regions unmergeable, to teach flatview code and vhost to not merge adjacent aliases to the same memory region into a larger memory section; instead, we want separate aliases to stay separate such that we can atomically map/unmap aliases without affecting other

[PATCH v1 06/15] vhost: Return number of free memslots

Let's return the number of free slots instead of only checking if there is a free slot. Required to support memory devices that consume multiple memslots. This is a preparation for memory devices that consume multiple memslots. Signed-off-by: David Hildenbrand --- hw/mem/memory-device.c| 2

[PATCH v1 11/15] memory-device: Support memory-devices with auto-detection of the number of memslots

We want to support memory devices that detect at runtime how many memslots they will use. The target use case is virtio-mem. Let's suggest a memslot limit to the device, such that the device can use that number to determine the number of memslots it wants to use. To make a sane suggestion that

[PATCH v1 10/15] pc-dimm: Provide pc_dimm_get_free_slots() to query free ram slots

memory device wants to figure out at per-device memslot limit for memory devices that want to consume more than a single memslot. We want to try setting the memslots required for DIMMs/NVDIMMs (1 memslot per such device) aside, so expose how many of these slots are still free. Keep it simple and

[PATCH v1 12/15] memory: Clarify mapping requirements for RamDiscardManager

We really only care about the RAM memory region not being mapped into an address space yet as long as we're still setting up the RamDiscardManager. Once mapped into an address space, memory notifiers would get notified about such a region and any attempts to modify the RamDiscardManager would be

[PATCH v1 08/15] memory-device: Track the actually used memslots in DeviceMemoryState

Let's track how many memslots are currently getting used by memory devices in the device memory region, and how many could be used at maximum ("required"). "required - used" is the number of reserved memslots that will get used in the future: we'll have to consider them when plugging new vhost

[PATCH v1 03/15] vhost: Add vhost_get_max_memslots()

Let's add vhost_get_max_memslots(), to perform a similar task as kvm_get_max_memslots(). Signed-off-by: David Hildenbrand --- hw/virtio/vhost-stub.c| 5 + hw/virtio/vhost.c | 11 +++ include/hw/virtio/vhost.h | 1 + 3 files changed, 17 insertions(+) diff --git

[PATCH v1 05/15] kvm: Return number of free memslots

Let's return the number of free slots instead of only checking if there is a free slot. While at it, check all address spaces, which will also consider SMM under x86 correctly. Make the stub return UINT_MAX, such that we can call the function unconditionally. This is a preparation for memory

[PATCH v1 02/15] kvm: Add stub for kvm_get_max_memslots()

We'll need the stub soon from memory device context. While at it, use "unsigned int" as return value and place the declaration next to kvm_get_free_memslots(). Signed-off-by: David Hildenbrand --- accel/kvm/kvm-all.c| 2 +- accel/stubs/kvm-stub.c | 5 + include/sysemu/kvm.h | 2 +- 3

[PATCH v1 00/15] virtio-mem: Expose device memory through multiple memslots

This is the follow-up on [1] that took longer than expected because vhost-user and other careless memslot consumers are just a pain. It's essentially a complete rewrite now that we have VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE (and I understood some nasty memslot details better), so no changelog. It's

[PATCH v1 01/15] memory-device: Track the required memslots in DeviceMemoryState

Let's track how many memslots are currently required by plugged memory devices. We'll use this number to perform sanity checks next (soft limit to warn the user). Right now, each memory device consumes exactly one memslot, and the number of required memslots matches the number of used memslots.

Re: [PATCH v3 00/19] Add RISC-V vector cryptographic instruction set support

Hi Lawrence, Can you please re-send, rebased on top of Alistair's riscv-to-apply.next? There are some comments from Weiwei Li that are worth considering. Richard Henderson also took patches 8-9-10 via his tcg queue so you don't have to worry about those. CC my email in the next version and

Re: [PATCH v2 1/3] hw/ufs: Initial commit for emulated Universal-Flash-Storage

On Fri, Jun 16, 2023 at 03:58:21PM +0900, Jeuk Kim wrote: > Universal Flash Storage (UFS) is a high-performance mass storage device > with a serial interface. It is primarily used as a high-performance > data storage device for embedded applications. > > This commit contains code for UFS device

Re: [PATCH] vfio/migration: Fix return value of vfio_migration_realize()

On 16/06/2023 03:42, Duan, Zhenzhong wrote: >> -Original Message- >> From: Joao Martins >> Sent: Thursday, June 15, 2023 6:23 PM >> To: Duan, Zhenzhong >> Cc: alex.william...@redhat.com; c...@redhat.com; qemu-devel@nongnu.org; >> Peng, Chao P >> Subject: Re: [PATCH] vfio/migration: Fix

Re: [PATCH v2 04/11] multifd: Count the number of bytes sent correctly

Hi,Juan, On 2023/1/30 下午4:09, Juan Quintela wrote: > Current code asumes that all pages are whole. That is not true for > example for compression already. Fix it for creating a new field > ->sent_bytes that includes it. > > All ram_counters are used only from the migration thread, so we have >

Re: [PATCH v2] hw/pci: prevent hotplug of devices on pcie-root-ports on the wrong slot

On Fri, 16 Jun 2023 13:06:06 +0530 Ani Sinha wrote: > > On 15-Jun-2023, at 4:56 PM, Igor Mammedov wrote: > > > > On Thu, 15 Jun 2023 10:46:45 +0530 > > Ani Sinha wrote: > > > >> PCIE root ports and other upstream ports only allow one device on slot 0. > >> When hotplugging a device on a

Re: [PATCH] hw/arm/xlnx: Connect secondary CGEM IRQs

Hi Kinsey, On [2023 Jun 15] Thu 08:48:47, Kinsey Moore wrote: > The Cadence GEM peripherals as configured for Zynq MPSoC and Versal > platforms have two priority queues with separate interrupt sources for > each. If the interrupt source for the second priority queue is not > connected, they work

Re: [PATCH v2 0/3] hw/ufs: Add Universal Flash Storage (UFS) support

On Fri, Jun 16, 2023 at 03:58:16PM +0900, Jeuk Kim wrote: > Since v1: > - use macros of "hw/registerfields.h" (Addressed Philippe's review comments) > > This patch series adds support for a new PCI-based UFS device. > > The UFS pci device id (PCI_DEVICE_ID_REDHAT_UFS) is not registered > in the

Re: [PATCH v8 0/6] migration: reduce time of loading non-iterable vmstate

Hi, Paolo, A few months ago, Juan told me that this series requires your or someone familiar with memory API's feedback. Could you please review it and provide some suggestions? On 2023/3/17 下午4:18, Chuang Xu wrote: In this version: - delete useless line change. - update comments and

A confusion about CXL in arm virt machine

Hi, Gregory There is one confusion about CXL in QEMU I hope to consult. If you have some time to look at this email, I would have better understanding of CXL emulation in QEMU. On docs/system/devices/cxl.rst , Gregory wrote: A very simple setup with just one directly attached CXL Type 3

Re: [PATCH v2] hw/pci: prevent hotplug of devices on pcie-root-ports on the wrong slot

> On 15-Jun-2023, at 4:56 PM, Igor Mammedov wrote: > > On Thu, 15 Jun 2023 10:46:45 +0530 > Ani Sinha wrote: > >> PCIE root ports and other upstream ports only allow one device on slot 0. >> When hotplugging a device on a pcie root port, make sure that the device >> address passed always

Re: [PATCH v2] hw/loongarch: Add numa support

在 2023/6/13 下午8:26, Tianrui Zhao 写道: From: Song Gao 1. Implement some functions for LoongArch numa support; 2. Implement fdt_add_memory_node() for fdt; 3. build_srat() fills node_id and adds build numa memory. Base-on:

Re: [PATCH] target/loongarch: Fix CSR.DMW0-3.VSEG check

在 2023/6/14 下午2:55, Jiajie Chen 写道: The previous code checks whether the highest 16 bits of virtual address equal to that of CSR.DMW0-3. This is incorrect according to the spec, and is corrected to compare only the highest four bits instead. Signed-off-by: Jiajie Chen ---

Re: [PATCH v2 2/2] hw/intc: Set physical cpuid route for LoongArch ipi device

在 2023/6/13 下午8:05, Tianrui Zhao 写道: LoongArch ipi device uses physical cpuid to route to different vcpus rather logical cpuid, and the physical cpuid is the same with cpuid in acpi dsdt and srat table. Signed-off-by: Tianrui Zhao Signed-off-by: Song Gao --- hw/intc/loongarch_ipi.c | 44

Re: [PATCH] hw/loongarch: Supplement cpu topology arguments

在 2023/6/13 下午8:32, Tianrui Zhao 写道: Supplement LoongArch cpu topology arguments, including support socket and threads per core. Base-on: https://patchew.org/QEMU/20230613122613.2471743-1-zhaotian...@loongson.cn/ Signed-off-by: Song Gao Signed-off-by: Tianrui Zhao ---

Re: [PATCH v2 1/2] hw/loongarch/virt: Add cpu arch_id support

在 2023/6/13 下午8:05, Tianrui Zhao 写道: With acpi madt table, there is cpu physical coreid, which may be different with logical id in qemu. This patch adds cpu arch_id support, and fill madt table with arch_id. For the present cpu arch_id is still equal to logical id. Signed-off-by: Tianrui

[PATCH v2 2/3] hw/ufs: Support for Query Transfer Requests

This commit makes the UFS device support query and nop out transfer requests. The next patch would be support for UFS logical unit and scsi command transfer request. Signed-off-by: Jeuk Kim --- hw/ufs/ufs.c | 968 ++- hw/ufs/ufs.h | 45 +++ 2

[PATCH v2 3/3] hw/ufs: Support for UFS logical unit

This commit adds support for ufs logical unit. The LU handles processing for the SCSI command, unit descriptor query request. This commit enables the UFS device to process IO requests. Signed-off-by: Jeuk Kim --- hw/ufs/lu.c | 1441 ++

[PATCH v2 1/3] hw/ufs: Initial commit for emulated Universal-Flash-Storage

Universal Flash Storage (UFS) is a high-performance mass storage device with a serial interface. It is primarily used as a high-performance data storage device for embedded applications. This commit contains code for UFS device to be recognized as a UFS PCI device. Patches to handle UFS logical

[PATCH v2 0/3] hw/ufs: Add Universal Flash Storage (UFS) support

Since v1: - use macros of "hw/registerfields.h" (Addressed Philippe's review comments) This patch series adds support for a new PCI-based UFS device. The UFS pci device id (PCI_DEVICE_ID_REDHAT_UFS) is not registered in the Linux kernel yet, so it does not work right away, but I confirmed that

Re: [PATCH] chardev/char-win-stdio: Support VT sequences on Windows 11 host

From: Huasen Zhang Hello, On Thu, 15 Jun 2023 12:57:55 +0200 Marc-André Lureau wrote: > Hi > > On Thu, Jun 15, 2023 at 12:36 PM Zhang Huasen > wrote: > > > If the monitor or the serial port use STDIO as backend on Windows 11 host, > > e.g. -nographic options is used, the monitor or the