/philmd/qemu.git tags/accel-sh4-ui-20240503
for you to fetch changes up to 2d27c91e2b72ac7a65504ac207c89262d92464eb:
ui/cocoa.m: Drop old macOS-10.12-and-earlier compat ifdefs (2024-05-03
17:33:26 +0200)
- Fix NULL dereference
Hi Zhukeqian,
On Fri, Mar 15, 2024 at 1:17 AM zhukeqian wrote:
> Hi Salil,
>
> [...]
>
> +void cpu_address_space_destroy(CPUState *cpu, int asidx) {
> +CPUAddressSpace *cpuas;
> +
> +assert(cpu->cpu_ases);
> +assert(asidx >= 0 && asidx < cpu->num_ases);
> +/* KVM cannot
On 4/26/24 08:39, Alex Bennée wrote:
I was asked to update the custom gitlab runner from the aging 20.04 to
22.04 which has been done. However I needed to update the provisioning
scripts and clean-up some of the cruft. Sadly this doesn't seem to be
passing cleanly as we have:
-
On Fri, May 03, 2024 at 06:19:30PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Fri, Apr 26, 2024 at 11:20:40AM -0300, Fabiano Rosas wrote:
> >> We're about to enable the use of O_DIRECT in the migration code and
> >> due to the alignment restrictions imposed by filesystems we need to
On Fri, May 03, 2024 at 06:31:06PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Fri, May 03, 2024 at 04:56:08PM -0300, Fabiano Rosas wrote:
> >> Peter Xu writes:
> >>
> >> > On Fri, Apr 26, 2024 at 11:20:35AM -0300, Fabiano Rosas wrote:
> >> >> When the migration using the "file:"
/rth7680/qemu.git tags/pull-misc-20240503
for you to fetch changes up to a06d9eddb015a9f5895161b0a3958a2e4be21579:
tests/bench: Add bufferiszero-bench (2024-05-03 08:03:35 -0700)
util/bufferiszero:
- Remove sse4.1 and avx512
Hi,
On Thu, Feb 08, 2024 at 07:12:40PM +0100, Philippe Mathieu-Daudé wrote:
> We should not wire IRQs on unrealized device.
>
> Signed-off-by: Philippe Mathieu-Daudé
> Reviewed-by: Peter Maydell
> Reviewed-by: Yoshinori Sato
qemu 9.0 fails to boot Linux from ide/ata drives with the sh4
and
Peter Xu writes:
> On Fri, May 03, 2024 at 04:56:08PM -0300, Fabiano Rosas wrote:
>> Peter Xu writes:
>>
>> > On Fri, Apr 26, 2024 at 11:20:35AM -0300, Fabiano Rosas wrote:
>> >> When the migration using the "file:" URI was implemented, I don't
>> >> think any of us noticed that if you pass in
On Fri, May 03, 2024 at 06:05:19PM -0300, Fabiano Rosas wrote:
> >> +#ifdef O_DIRECT
> >> +static void *migrate_mapped_ram_dio_start(QTestState *from,
> >> + QTestState *to)
> >> +{
> >> +migrate_mapped_ram_start(from, to);
> >
> > This line
Peter Xu writes:
> On Fri, Apr 26, 2024 at 11:20:40AM -0300, Fabiano Rosas wrote:
>> We're about to enable the use of O_DIRECT in the migration code and
>> due to the alignment restrictions imposed by filesystems we need to
>> make sure the flag is only used when doing aligned IO.
>>
>> The
On Fri, May 03, 2024 at 05:54:28PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Fri, Apr 26, 2024 at 11:20:38AM -0300, Fabiano Rosas wrote:
> >> When multifd is used along with mapped-ram, we can take benefit of a
> >> filesystem that supports the O_DIRECT flag and perform direct I/O
On Fri, May 03, 2024 at 05:49:32PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Fri, Apr 26, 2024 at 11:20:37AM -0300, Fabiano Rosas wrote:
> >> Add the direct-io migration parameter that tells the migration code to
> >> use O_DIRECT when opening the migration stream file whenever
The number of PIDs is in the upper 16 bits of cdw10. So we need to
right-shift by 16 bits instead of only a single bit.
Signed-off-by: Vincent Fu
---
hw/nvme/ctrl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 127c3d2383..e89f9f7808
On Fri, May 03, 2024 at 05:36:59PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Fri, Apr 26, 2024 at 11:20:36AM -0300, Fabiano Rosas wrote:
> >> When doing file migration, QEMU accepts an offset that should be
> >> skipped when writing the migration stream to the file. The purpose of
Peter Xu writes:
> On Fri, Apr 26, 2024 at 11:20:39AM -0300, Fabiano Rosas wrote:
>> The tests are only allowed to run in systems that know about the
>> O_DIRECT flag and in filesystems which support it.
>>
>> Signed-off-by: Fabiano Rosas
>
> Mostly:
>
> Reviewed-by: Peter Xu
>
> Two trivial
On Fri, May 03, 2024 at 04:56:08PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Fri, Apr 26, 2024 at 11:20:35AM -0300, Fabiano Rosas wrote:
> >> When the migration using the "file:" URI was implemented, I don't
> >> think any of us noticed that if you pass in a file name with the
> >>
Peter Xu writes:
> On Fri, Apr 26, 2024 at 11:20:38AM -0300, Fabiano Rosas wrote:
>> When multifd is used along with mapped-ram, we can take benefit of a
>> filesystem that supports the O_DIRECT flag and perform direct I/O in
>> the multifd threads. This brings a significant performance
Peter Xu writes:
> On Fri, Apr 26, 2024 at 11:20:37AM -0300, Fabiano Rosas wrote:
>> Add the direct-io migration parameter that tells the migration code to
>> use O_DIRECT when opening the migration stream file whenever possible.
>>
>> This is currently only used with the mapped-ram migration
Peter Xu writes:
> On Fri, Apr 26, 2024 at 11:20:36AM -0300, Fabiano Rosas wrote:
>> When doing file migration, QEMU accepts an offset that should be
>> skipped when writing the migration stream to the file. The purpose of
>> the offset is to allow the management layer to put its own metadata at
Hi Vishnu,
> From: Vishnu Pajjuri
> Sent: Thursday, April 4, 2024 3:01 PM
> To: Salil Mehta ; qemu-devel@nongnu.org;
> qemu-...@nongnu.org
>
> Hi Salil,
>> On 12-03-2024 07:29, Salil Mehta wrote:
>> ACPI GED (as described in the ACPI 6.4 spec) uses an interrupt listed in the
>> _CRS
Peter Xu writes:
> On Fri, May 03, 2024 at 09:13:27AM -0400, Steven Sistare wrote:
>> On 5/3/2024 8:49 AM, Fabiano Rosas wrote:
>> > Markus Armbruster writes:
>> >
>> > > Commit 074dbce5fcce (migration: New migrate and migrate-incoming
>> > > argument 'channels') and its fixup commit
Hello,
Sorry, I missed this earlier.
> From: Zhao Liu
> Sent: Wednesday, March 13, 2024 6:14 AM
> To: Salil Mehta
>
> Hi Salil,
>
> It seems my comment [1] in v7 was missed, but I still hit the same issue. Pls
> let me paste the previous comment here again.
>
> [1]:
On Tue, Apr 30, 2024 at 4:12 PM Peter Maydell
wrote:
> On Mon, 29 Apr 2024 at 21:40, Niek Linnenbank
> wrote:
> >
> > Hi Peter, Strahinja,
> >
> > I can confirm that the orangepi-pc and cubieboard based tests are
> working OK using the newer kernel 6.6.16:
> >
> > $
Peter Xu writes:
> On Fri, Apr 26, 2024 at 11:20:35AM -0300, Fabiano Rosas wrote:
>> When the migration using the "file:" URI was implemented, I don't
>> think any of us noticed that if you pass in a file name with the
>> format "/dev/fdset/N", this allows a file descriptor to be passed in
>> to
Hi Vishnu,
Sorry for the delay in reply. Still catching up.
> From: Vishnu Pajjuri
> Sent: Thursday, April 4, 2024 3:02 PM
> To: Salil Mehta ; qemu-devel@nongnu.org;
> qemu-...@nongnu.org
>
> Hi Salil,
> On 12-03-2024 07:29, Salil Mehta wrote:
>> Add common function to help unregister
On 3/5/24 21:11, Philippe Mathieu-Daudé wrote:
On 2/5/24 18:55, Richard Henderson wrote:
The unit operation for fmul8x16 and friends is described in the
manual as "MS16b". Split that out for clarity. Improve rounding
with an unconditional addition of 0.5 as a fixed-point integer.
On Fri, May 03, 2024 at 09:13:27AM -0400, Steven Sistare wrote:
> On 5/3/2024 8:49 AM, Fabiano Rosas wrote:
> > Markus Armbruster writes:
> >
> > > Commit 074dbce5fcce (migration: New migrate and migrate-incoming
> > > argument 'channels') and its fixup commit 57fd4b4e1075 made command
> > >
On 2/5/24 18:55, Richard Henderson wrote:
The unit operation for fmul8x16 and friends is described in the
manual as "MS16b". Split that out for clarity. Improve rounding
with an unconditional addition of 0.5 as a fixed-point integer.
Signed-off-by: Richard Henderson
---
Hello,
Just replied to your other thread just now. Sorry catching everything late.
Thanks
> From: Harsh Prateek Bora
> Sent: Tuesday, April 23, 2024 7:44 AM
>
> + Nick
>
> Hi Salil,
> I have posted a patch [1] for ppc which based on this refactoring patch.
> I see there were some
On Fri, Apr 26, 2024 at 11:20:40AM -0300, Fabiano Rosas wrote:
> We're about to enable the use of O_DIRECT in the migration code and
> due to the alignment restrictions imposed by filesystems we need to
> make sure the flag is only used when doing aligned IO.
>
> The migration will do parallel IO
Hi Harsh,
Sorry for the delay in my reply. I've been off the grid for some time so missed
this
earlier mail. Please find my reply below to you query.
Thanks
> From: Harsh Prateek Bora
> Sent: Friday, March 22, 2024 8:15 AM
>
> + Vaibhav, Shiva
>
> Hi Salil,
>
> I came across your
On Fri, Apr 26, 2024 at 11:20:39AM -0300, Fabiano Rosas wrote:
> The tests are only allowed to run in systems that know about the
> O_DIRECT flag and in filesystems which support it.
>
> Signed-off-by: Fabiano Rosas
Mostly:
Reviewed-by: Peter Xu
Two trivial comments below.
> ---
>
On 2/5/24 18:55, Richard Henderson wrote:
This is a 2-operand instruction, not 3-operand.
Worse, we took the source from the wrong operand.
Signed-off-by: Richard Henderson
---
target/sparc/helper.h | 2 +-
target/sparc/insns.decode | 2 +-
target/sparc/translate.c | 20
On 2/5/24 18:55, Richard Henderson wrote:
These instructions have f32 inputs, which changes the decode
of the register numbers. While we're fixing things, use a
common helper for both insns, extracting the 16-bit scalar
in tcg beforehand.
Signed-off-by: Richard Henderson
---
On 2/5/24 18:55, Richard Henderson wrote:
This instruction has f32 as source1, which alters the
decoding of the register number, which means we've been
passing the wrong data for odd register numbers.
Signed-off-by: Richard Henderson
---
target/sparc/helper.h | 2 +-
On Fri, Apr 26, 2024 at 11:20:38AM -0300, Fabiano Rosas wrote:
> When multifd is used along with mapped-ram, we can take benefit of a
> filesystem that supports the O_DIRECT flag and perform direct I/O in
> the multifd threads. This brings a significant performance improvement
> because direct-io
On 2/5/24 18:55, Richard Henderson wrote:
This instruction has f32 inputs, which changes the decode
of the register numbers.
Signed-off-by: Richard Henderson
---
target/sparc/helper.h | 2 +-
target/sparc/translate.c | 2 +-
target/sparc/vis_helper.c | 27 ++-
On 3/5/24 17:57, Salil Mehta wrote:
Hi Philippe,
From: Philippe Mathieu-Daudé
Sent: Friday, May 3, 2024 10:40 AM
Subject: Re: [PATCH V8 1/8] accel/kvm: Extract common KVM vCPU
{creation,parking} code
Hi Salil,
On 12/3/24 02:59, Salil Mehta wrote:
> KVM vCPU creation is
On 2/5/24 18:55, Richard Henderson wrote:
Split out from my vis4 patch set, with just the bug fixes.
I've fixed the issue in patch 6, as noticed by Mark, but
include the follow-up that cleans up all of the macros by
removing them.
r~
Richard Henderson (7):
linux-user/sparc: Add more hwcap
On Fri, May 3, 2024 at 10:28 PM Peter Maydell wrote:
>
> On Fri, 19 Apr 2024 at 19:31, Dorjoy Chowdhury wrote:
> >
> > Some ARM CPUs advertise themselves as SMT by having the MT[24] bit set
> > to 1 in the MPIDR register. These CPUs have the thread id in Aff0[7:0]
> > bits, CPU id in Aff1[15:8]
On Fri, Apr 26, 2024 at 11:20:37AM -0300, Fabiano Rosas wrote:
> Add the direct-io migration parameter that tells the migration code to
> use O_DIRECT when opening the migration stream file whenever possible.
>
> This is currently only used with the mapped-ram migration that has a
> clear window
On 3/5/24 19:13, Paolo Bonzini wrote:
qga/commands-posix.c does not compile on FreeBSD due to a confusion
between "chpasswdata" (wrong) and "chpasswddata" (used in the #else
branch).
Fixes: 0e5b75a390 ("qga/commands-posix: qmp_guest_set_user_password: use
ga_run_command helper")
Observed the following failure while booting the SEV-SNP guest and the
guest fails to boot with the smp parameters:
"-smp 192,sockets=1,dies=12,cores=8,threads=2".
qemu-system-x86_64: sev_snp_launch_update: SNP_LAUNCH_UPDATE ret=-5 fw_error=22
'Invalid parameter'
qemu-system-x86_64: SEV-SNP:
Am 06.02.2024 um 20:06 hat Stefan Hajnoczi geschrieben:
> The aio_co_reschedule_self() API is designed to avoid the race
> condition between scheduling the coroutine in another AioContext and
> yielding.
>
> The QMP dispatch code uses the open-coded version that appears
> susceptible to the race
On 03/05/2024 19.13, Paolo Bonzini wrote:
qga/commands-posix.c does not compile on FreeBSD due to a confusion
between "chpasswdata" (wrong) and "chpasswddata" (used in the #else
branch).
Signed-off-by: Paolo Bonzini
---
qga/commands-posix.c | 2 +-
1 file changed, 1 insertion(+), 1
qga/commands-posix.c does not compile on FreeBSD due to a confusion
between "chpasswdata" (wrong) and "chpasswddata" (used in the #else
branch).
Signed-off-by: Paolo Bonzini
---
qga/commands-posix.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qga/commands-posix.c
The Hexagon Programmer's Reference Manual says that the exception 0x1e
should be raised upon an unaligned program counter. Let's implement that
and also add some tests.
Signed-off-by: Matheus Tavares Bernardino
Reviewed-by: Richard Henderson
Reviewed-by: Taylor Simpson
---
Changes in v6:
- The
On Fri, May 3, 2024 at 10:28 PM Peter Maydell wrote:
>
> On Fri, 19 Apr 2024 at 19:31, Dorjoy Chowdhury wrote:
> >
> > Some ARM CPUs advertise themselves as SMT by having the MT[24] bit set
> > to 1 in the MPIDR register. These CPUs have the thread id in Aff0[7:0]
> > bits, CPU id in Aff1[15:8]
On Fri, Apr 26, 2024 at 11:20:36AM -0300, Fabiano Rosas wrote:
> When doing file migration, QEMU accepts an offset that should be
> skipped when writing the migration stream to the file. The purpose of
> the offset is to allow the management layer to put its own metadata at
> the start of the
On Thu, 2 May 2024 at 15:16, Alexandra Diupina wrote:
>
> Add xlnx_dpdma_read_descriptor() and
> xlnx_dpdma_write_descriptor() functions.
> xlnx_dpdma_read_descriptor() combines reading a
> descriptor from desc_addr by calling dma_memory_read()
> and swapping the desc fields from guest memory
On Fri, 19 Apr 2024 at 19:31, Dorjoy Chowdhury wrote:
>
> Some ARM CPUs advertise themselves as SMT by having the MT[24] bit set
> to 1 in the MPIDR register. These CPUs have the thread id in Aff0[7:0]
> bits, CPU id in Aff1[15:8] bits and cluster id in Aff2[23:16] bits in
> MPIDR.
>
> On the
Hi Vishnu,
> From: Vishnu Pajjuri
> Sent: Thursday, April 4, 2024 3:00 PM
> Subject: Re: [PATCH V8 1/8] accel/kvm: Extract common KVM vCPU
> {creation,parking} code
>
> Hi Salil,
>> On 12-03-2024 07:29, Salil Mehta wrote:
>> KVM vCPU creation is done once during the vCPU realization
On Fri, Apr 26, 2024 at 11:20:35AM -0300, Fabiano Rosas wrote:
> When the migration using the "file:" URI was implemented, I don't
> think any of us noticed that if you pass in a file name with the
> format "/dev/fdset/N", this allows a file descriptor to be passed in
> to QEMU and that behaves
On Fri, Apr 26, 2024 at 11:20:34AM -0300, Fabiano Rosas wrote:
> We're enabling using the fdset interface to pass file descriptors for
> use in the migration code. Since migrations can happen more than once
> during the VMs lifetime, we need a way to remove an fd from the fdset
> at the end of
Hi Philippe,
> From: Philippe Mathieu-Daudé
> Sent: Friday, May 3, 2024 10:40 AM
> Subject: Re: [PATCH V8 1/8] accel/kvm: Extract common KVM vCPU
> {creation,parking} code
>
> Hi Salil,
>
> On 12/3/24 02:59, Salil Mehta wrote:
> > KVM vCPU creation is done once during the vCPU
To easily compare with the SH4 manual, rename:
REG(B11_8) -> Rn
REG(B7_4) -> Rm
t0 -> result
Mention how underflow is calculated.
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20240430163125.77430-5-phi...@linaro.org>
---
target/sh4/translate.c | 16
To easily compare with the SH4 manual, rename:
REG(B11_8) -> Rn
REG(B7_4) -> Rm
t0 -> result
Mention how overflow is calculated.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Yoshinori Sato
Message-Id: <20240430163125.77430-4-phi...@linaro.org>
---
"plugin_mask" was renamed as "event_mask" in commit c006147122
("plugins: create CPUPluginState and migrate plugin_mask").
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240427155714.53669-3-phi...@linaro.org>
---
plugins/core.c | 2 +-
1 file changed, 1
"exec/ram_addr.h" shouldn't be used with user emulation.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Richard Henderson
Message-Id: <20240427155714.53669-4-phi...@linaro.org>
---
plugins/api.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/plugins/api.c b/plugins/api.c
Keep all user emulation headers under the same user/ directory.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240428221450.26460-2-phi...@linaro.org>
---
MAINTAINERS | 1 -
bsd-user/qemu.h | 2 +-
include/{exec =>
The documentation says:
SUBV Rm, RnRn - Rm -> Rn, underflow -> T
The overflow / underflow can be calculated as:
T = ((Rn ^ Rm) & (Result ^ Rn)) >> 31
However we were using the incorrect:
T = ((Rn ^ Rm) & (Result ^ Rm)) >> 31
Fix by using the Rn register instead of Rm.
Add
From: Peter Maydell
We only support the most recent two versions of macOS (currently
macOS 13 Ventura and macOS 14 Sonoma), and our ui/cocoa.m code
already assumes at least macOS 12 Monterey or better, because it uses
NSScreen safeAreaInsets, which is 12.0-or-newer.
Remove the ifdefs that were
From: Anthony PERARD
Signed-off-by: Anthony PERARD
Acked-by: Paul Durrant
Acked-by: Stefano Stabellini
Message-ID: <20240429154938.19340-1-anthony.per...@citrix.com>
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Keep all user emulation headers under the same user/ directory.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240503125202.35667-1-phi...@linaro.org>
---
bsd-user/qemu.h| 2 +-
include/exec/cpu-all.h | 2 +-
The documentation says:
ADDV Rm, RnRn + Rm -> Rn, overflow -> T
But QEMU implementation was:
ADDV Rm, RnRn + Rm -> Rm, overflow -> T
Fix by filling the correct Rm register.
Add tests provided by Paul Cercueil.
Cc: qemu-sta...@nongnu.org
Fixes: ad8d25a11f ("target-sh4:
Commit 1ad2134f91 ("Hardware convenience library") extracted
"cpu-common.h" from "cpu-all.h", which uses the LGPL-2.1+ license.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240427155714.53669-5-phi...@linaro.org>
---
include/exec/cpu-common.h | 9
All user emulation headers are now under include/user/.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20240428221450.26460-3-phi...@linaro.org>
---
scripts/coverity-scan/COMPONENTS.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
When mechanically moving the @dirty field to AccelCPUState
in commit 9ad49538c7, we neglected cpu->accel is still NULL
when we want to dereference it.
Fixes: 9ad49538c7 ("accel/whpx: Use accel-specific per-vcpu @dirty field")
Reported-by: Volker Rümelin
Suggested-by: Volker Rümelin
When mechanically moving the @dirty field to AccelCPUState
in commit 79f1926b2d, we neglected cpu->accel is still NULL
when we want to dereference it.
Reported-by: Volker Rümelin
Suggested-by: Volker Rümelin
Fixes: 79f1926b2d ("accel/nvmm: Use accel-specific per-vcpu @dirty field")
The following changes since commit fd87be1dada5672f877e03c2ca8504458292c479:
Merge tag 'accel-20240426' of https://github.com/philmd/qemu into staging
(2024-04-26 15:28:13 -0700)
are available in the Git repository at:
https://github.com/philmd/qemu.git tags/accel-sh4-ui-20240503
for you
We wrongly encoded ID_AA64PFR1_EL1 using {3,0,0,4,2} in hvf_sreg_match[] so
we fail to get the expected ARMCPRegInfo from cp_regs hash table with the
wrong key.
Fix it with the correct encoding {3,0,0,4,1}. With that fixed, the Linux
guest can properly detect FEAT_SSBS2 on my M1 HW.
All
Split less-than and greater-than 256 cases.
Use unaligned accesses for head and tail.
Avoid using out-of-bounds pointers in loop boundary conditions.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
util/bufferiszero.c | 85 +++--
From: Alexander Monakov
Use of prefetching in bufferiszero.c is quite questionable:
- prefetches are issued just a few CPU cycles before the corresponding
line would be hit by demand loads;
- they are done for simple access patterns, i.e. where hardware
prefetchers can perform better;
-
On 3/5/24 15:49, Paolo Bonzini wrote:
target/ppc/kvm.c calls out to code in hw/ppc/spapr*.c; that code is
not present and fails to link if CONFIG_PSERIES is not enabled.
Adjust kvm.c to depend on CONFIG_PSERIES instead of TARGET_PPC64,
and compile out anything that requires cap_papr, because
Benchmark each acceleration function vs an aligned buffer of zeros.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tests/bench/bufferiszero-bench.c | 47
tests/bench/meson.build | 1 +
2 files changed, 48 insertions(+)
From: Alexander Monakov
Thanks to early checks in the inline buffer_is_zero wrapper, the SIMD
routines are invoked much more rarely in normal use when most buffers
are non-zero. This makes use of AVX512 unprofitable, as it incurs extra
frequency and voltage transition periods during which the
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
util/bufferiszero.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/util/bufferiszero.c b/util/bufferiszero.c
index c9a7ded016..f9af7841ba 100644
--- a/util/bufferiszero.c
+++
Because the three alternatives are monotonic, we don't need
to keep a couple of bitmasks, just identify the strongest
alternative at startup.
Generalize test_buffer_is_zero_next_accel and init_accel
by always defining an accel_table array.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by:
Because non-embedded aarch64 is expected to have AdvSIMD enabled, merely
double-check with the compiler flags for __ARM_NEON and don't bother with
a runtime check. Otherwise, model the loop after the x86 SSE2 function.
Use UMAXV for the vector reduction. This is 3 cycles on cortex-a76 and
2
From: Alexander Monakov
Increase unroll factor in SIMD loops from 4x to 8x in order to move
their bottlenecks from ALU port contention to load issue rate (two loads
per cycle on popular x86 implementations).
Avoid using out-of-bounds pointers in loop boundary conditions.
Follow SSE2
From: Alexander Monakov
Test for length >= 256 inline, where is is often a constant.
Before calling into the accelerated routine, sample three bytes
from the buffer, which handles most non-zero buffers.
Signed-off-by: Alexander Monakov
Signed-off-by: Mikhail Romanov
Message-Id:
The following changes since commit 4977ce198d2390bff8c71ad5cb1a5f6aa24b56fb:
Merge tag 'pull-tcg-20240501' of https://gitlab.com/rth7680/qemu into staging
(2024-05-01 15:15:33 -0700)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-misc-20240503
From: Alexander Monakov
The SSE4.1 variant is virtually identical to the SSE2 variant, except
for using 'PTEST+JNZ' in place of 'PCMPEQB+PMOVMSKB+CMP+JNE' for testing
if an SSE register is all zeroes. The PTEST instruction decodes to two
uops, so it can be handled only by the complex decoder,
On 25/4/24 01:31, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 1 +
accel/tcg/plugin-gen.c | 1 +
2 files changed, 2 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
+Claudio & Peter
On 3/5/24 14:34, Philippe Mathieu-Daudé wrote:
Philippe Mathieu-Daudé (5):
accel/tcg: Move SoftMMU specific units to softmmu_specific_ss[]
accel/tcg: Move system emulation files under sysemu/ subdirectory
accel/tcg: Do not define cpu_exec_reset_hold() as stub
On 24/4/24 19:09, Richard Henderson wrote:
This may be treated as a 32-bit EQ/NE comparison against 0,
which is in turn treated as a LTU/GEU comparison against 1.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.c.inc | 17 +++--
1 file changed, 15 insertions(+), 2
On 24/4/24 19:09, Richard Henderson wrote:
Record the fact that we've found a breakpoint on the page
in which a TranslationBlock is running.
Signed-off-by: Richard Henderson
---
include/exec/translation-block.h | 1 +
accel/tcg/cpu-exec.c | 2 +-
2 files changed, 2
On 24/4/24 19:09, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
include/tcg/tcg-op-gvec-common.h | 2 ++
tcg/tcg-op-gvec.c| 30 ++
2 files changed, 24 insertions(+), 8 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 5/3/24 07:58, Philippe Mathieu-Daudé wrote:
On 24/4/24 19:09, Richard Henderson wrote:
For cpus using PMSA, when the MPU is disabled, the default memory
type is Normal, Non-cachable.
Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when translation
disabled")
Reported-by:
On 24/4/24 19:09, Richard Henderson wrote:
For cpus using PMSA, when the MPU is disabled, the default memory
type is Normal, Non-cachable.
Fixes: 59754f85ed3 ("target/arm: Do memory type alignment check when translation
disabled")
Reported-by: Clément Chigot
Signed-off-by: Richard Henderson
In case of migration, during restore operation, qemu checks config space of the
pci device with the config space in the migration stream captured during save
operation. In case of config space data mismatch, restore operation is failed.
config space check is done in function
On 5/3/24 06:38, Matheus Tavares Bernardino wrote:
On Thu, 2 May 2024 13:00:34 -0700 Richard Henderson
wrote:
On 5/2/24 12:20, Matheus Tavares Bernardino wrote:
+
+void test_multi_cof(void)
+{
+asm volatile(
+"p0 = cmp.eq(r0, r0)\n"
+"{\n"
+"if (p0) jump
Peter missed the Sphinx HMP document for the "resume/-r" flag in commit
7a4da28b26 ("qmp: hmp: add migrate "resume" option"). Add it.
When at it, slightly cleanup the lines around:
- Move "detach/-d" to a separate section rather than appending it at the
end of the command description. Add a
On Fri, May 03, 2024 at 04:08:45PM +0200, Markus Armbruster wrote:
> If there's still time, suggest to tweak the subject to
>
> hmp/migration: Fix "migrate" command's documentation
Yes there is. :)
>
> Peter Xu writes:
>
> > On Fri, May 03, 2024 at 08:58:09AM +0200, Markus Armbruster
On 4/30/24 10:51, Jamin Lin wrote:
Hi Cedric,
On 4/19/24 15:41, Cédric Le Goater wrote:
On 4/16/24 11:18, Jamin Lin wrote:
DMA length is from 1 byte to 32MB for AST2600 and AST10x0 and DMA
length is from 4 bytes to 32MB for AST2500.
In other words, if "R_DMA_LEN" is 0, it should move at
On Fri, May 03, 2024 at 08:40:03AM +0200, Jinpu Wang wrote:
> I had a brief check in the rsocket changelog, there seems some
> improvement over time,
> might be worth revisiting this. due to socket abstraction, we can't
> use some feature like
> ODP, it won't be a small and easy task.
It'll be
On 5/3/24 16:10, Jason Gunthorpe wrote:
On Fri, May 03, 2024 at 04:04:25PM +0200, Cédric Le Goater wrote:
However, have you considered another/complementary approach which
would be to create an host IOMMU (iommufd) backend object and a vIOMMU
device object together for each vfio-pci device
Hello Jamin,
On 4/30/24 09:56, Jamin Lin wrote:
Hi Cedric,
-Original Message-
From: Cédric Le Goater
Sent: Tuesday, April 30, 2024 3:26 PM
To: Jamin Lin ; Peter Maydell
; Andrew Jeffery ;
Joel Stanley ; Alistair Francis ; Cleber
Rosa ; Philippe Mathieu-Daudé ;
Wainer dos Santos
On Fri, May 03, 2024 at 04:04:25PM +0200, Cédric Le Goater wrote:
> However, have you considered another/complementary approach which
> would be to create an host IOMMU (iommufd) backend object and a vIOMMU
> device object together for each vfio-pci device being plugged in the
> machine ?
>
>
If there's still time, suggest to tweak the subject to
hmp/migration: Fix "migrate" command's documentation
Peter Xu writes:
> On Fri, May 03, 2024 at 08:58:09AM +0200, Markus Armbruster wrote:
>> Peter Xu writes:
>>
>> > Peter missed the Sphinx HMP document for the "resume/-r" flag in
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