On 4/29/24 04:21, Frank Chang wrote:
Daniel Henrique Barboza mailto:dbarb...@ventanamicro.com>> 於 2024年3月8日 週五 上午12:04寫道:
>
> From: Tomasz Jeznach mailto:tjezn...@rivosinc.com>>
>
> The RISC-V IOMMU can be modelled as a PCIe device following the
> guidelines of the RISC-V IOMMU spec,
Daniel Henrique Barboza 於 2024年3月8日 週五
上午12:04寫道:
>
> From: Tomasz Jeznach
>
> The RISC-V IOMMU can be modelled as a PCIe device following the
> guidelines of the RISC-V IOMMU spec, chapter 7.1, "Integrating an IOMMU
> as a PCIe device".
>
> Signed-off-by: Tomasz Jeznach
> Signed-off-by: Daniel
From: Tomasz Jeznach
The RISC-V IOMMU can be modelled as a PCIe device following the
guidelines of the RISC-V IOMMU spec, chapter 7.1, "Integrating an IOMMU
as a PCIe device".
Signed-off-by: Tomasz Jeznach
Signed-off-by: Daniel Henrique Barboza
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hw/riscv/meson.build | 2 +-