All,
On Fri, Aug 26, 2011 at 11:32 AM, Tirumala Marri tma...@apm.com wrote:
Hi Stefan,
Yes. Mike, could you please re-send your patch with this suggested split?
Marri, could you please test this result on an 460SX board? And perhaps send
send a patch to fix potentially remaining 460SX
Stefan,
On Mon, Jul 25, 2011 at 7:55 AM, Stefan Roese s...@denx.de wrote:
Hi Mike,
On Thursday 21 July 2011 17:06:03 Mike Williams wrote:
This code has been changed to read the CPU speed information from the
CPR registers rather than the bootstrap registers. This is useful when
changing
Wolfgang,
On Mon, Jul 25, 2011 at 2:05 PM, Wolfgang Denk w...@denx.de wrote:
Dear Stefan,
In message 201107251711.21381...@denx.de you wrote:
I also don't have access to an 460SX board. And yes, perhaps its best to
split
the code now (460EX/GT vs. 460SX).
Marri, what do you think?
Recieve/Receive
recieve/receive
Interupt/Interrupt
interupt/interrupt
Addres/Address
addres/address
Signed-off-by: Mike Williams m...@mikebwilliams.com
---
arch/arm/cpu/arm720t/lpc2292/mmc_hw.c |4 ++--
arch/arm/cpu/arm720t/start.S |2 +-
arch/arm/cpu
Wolfgang,
+#define CPR0_PLBED 0x0080 /* PLL PLB Ealry Clock Divider */
s/Ealry/Early/
+#define PERDV_MASK 0x0300 /* Periferal Clock Divisor */
s/Periferal/Peripheral/
Patch coming soon, should have proofread those... Should I mail in a
patch for the
This code has been changed to read the CPU speed information from the
CPR registers rather than the bootstrap registers. This is useful when
changing the clock speed to something other than the default on boot.
Signed-off-by: Mike Williams m...@mikebwilliams.com
---
arch/powerpc/cpu/ppc4xx
This code has been changed to read the CPU speed information from the
CPR registers rather than the bootstrap registers. This is useful when
changing the clock speed to something other than the default on boot.
Signed-off-by: Mike Williams m...@mikebwilliams.com
---
arch/powerpc/cpu/ppc4xx
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