Signed-off-by: Masahiro Yamada <yamada.masah...@socionext.com>
---
arch/arm/dts/uniphier-ld11-global.dts | 2 +-
arch/arm/dts/uniphier-ld11-ref.dts | 8 +-
arch/arm/dts/uniphier-ld20-global.dts | 2 +-
arch/arm/dts/uniphier-ld20-ref.dts | 8 +-
arch/arm/dts/uniphier-ld20.dtsi | 2 +
arch/arm/dts/uniphier-ld4-ref.dts | 6 +-
arch/arm/dts/uniphier-ld6b-ref.dts | 7 +-
arch/arm/dts/uniphier-pinctrl.dtsi | 5 +
arch/arm/dts/uniphier-pro4-ace.dts | 2 +-
arch/arm/dts/uniphier-pro4-ref.dts | 8 +-
arch/arm/dts/uniphier-pro4-sanji.dts | 3 +-
arch/arm/dts/uniphier-pro5.dtsi | 190 +++++++++++++++++++++---
arch/arm/dts/uniphier-pxs2-gentil.dts | 2 +-
arch/arm/dts/uniphier-pxs2-vodka.dts | 2 +-
arch/arm/dts/uniphier-pxs3-ref.dts | 10 +-
arch/arm/dts/uniphier-pxs3.dtsi | 2 +
arch/arm/dts/uniphier-sld8-ref.dts | 6 +-
arch/arm/dts/uniphier-support-card.dtsi | 31 ++--
18 files changed, 235 insertions(+), 61 deletions(-)
diff --git a/arch/arm/dts/uniphier-ld11-global.dts
b/arch/arm/dts/uniphier-ld11-global.dts
index 670e1a76db..644ffb9707 100644
--- a/arch/arm/dts/uniphier-ld11-global.dts
+++ b/arch/arm/dts/uniphier-ld11-global.dts
@@ -157,7 +157,7 @@
};
&mdio {
- ethphy: ethphy@1 {
+ ethphy: ethernet-phy@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/uniphier-ld11-ref.dts
b/arch/arm/dts/uniphier-ld11-ref.dts
index 693171f82f..617d2b1e9b 100644
--- a/arch/arm/dts/uniphier-ld11-ref.dts
+++ b/arch/arm/dts/uniphier-ld11-ref.dts
@@ -20,7 +20,7 @@
aliases {
serial0 = &serial0;
- serial1 = &serial1;
+ serial1 = &serialsc;
serial2 = &serial2;
serial3 = &serial3;
i2c0 = &i2c0;
@@ -42,6 +42,10 @@
interrupts = <0 8>;
};
+&serialsc {
+ interrupts = <0 8>;
+};
+
&serial0 {
status = "okay";
};
@@ -76,7 +80,7 @@
};
&mdio {
- ethphy: ethphy@1 {
+ ethphy: ethernet-phy@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/uniphier-ld20-global.dts
b/arch/arm/dts/uniphier-ld20-global.dts
index 2c00008266..a01579cb3b 100644
--- a/arch/arm/dts/uniphier-ld20-global.dts
+++ b/arch/arm/dts/uniphier-ld20-global.dts
@@ -141,7 +141,7 @@
};
&mdio {
- ethphy: ethphy@1 {
+ ethphy: ethernet-phy@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/uniphier-ld20-ref.dts
b/arch/arm/dts/uniphier-ld20-ref.dts
index eeb976e789..39ee279a1e 100644
--- a/arch/arm/dts/uniphier-ld20-ref.dts
+++ b/arch/arm/dts/uniphier-ld20-ref.dts
@@ -20,7 +20,7 @@
aliases {
serial0 = &serial0;
- serial1 = &serial1;
+ serial1 = &serialsc;
serial2 = &serial2;
serial3 = &serial3;
i2c0 = &i2c0;
@@ -42,6 +42,10 @@
interrupts = <0 8>;
};
+&serialsc {
+ interrupts = <0 8>;
+};
+
&serial0 {
status = "okay";
};
@@ -64,7 +68,7 @@
};
&mdio {
- ethphy: ethphy@0 {
+ ethphy: ethernet-phy@0 {
reg = <0>;
};
};
diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index a5cd026838..5e7143ed01 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -955,7 +955,9 @@
compatible = "socionext,uniphier-ld20-pcie-phy";
reg = <0x66038000 0x4000>;
#phy-cells = <0>;
+ clock-names = "link";
clocks = <&sys_clk 24>;
+ reset-names = "link";
resets = <&sys_rst 24>;
socionext,syscon = <&soc_glue>;
};
diff --git a/arch/arm/dts/uniphier-ld4-ref.dts
b/arch/arm/dts/uniphier-ld4-ref.dts
index 3aaca10f66..03fe696668 100644
--- a/arch/arm/dts/uniphier-ld4-ref.dts
+++ b/arch/arm/dts/uniphier-ld4-ref.dts
@@ -20,7 +20,7 @@
aliases {
serial0 = &serial0;
- serial1 = &serial1;
+ serial1 = &serialsc;
serial2 = &serial2;
serial3 = &serial3;
i2c0 = &i2c0;
@@ -39,6 +39,10 @@
interrupts = <1 8>;
};
+&serialsc {
+ interrupts = <1 8>;
+};
+
&serial0 {
status = "okay";
};
diff --git a/arch/arm/dts/uniphier-ld6b-ref.dts
b/arch/arm/dts/uniphier-ld6b-ref.dts
index f1a3b29bac..08943aa376 100644
--- a/arch/arm/dts/uniphier-ld6b-ref.dts
+++ b/arch/arm/dts/uniphier-ld6b-ref.dts
@@ -22,6 +22,7 @@
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
+ serial3 = &serialsc;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -42,6 +43,10 @@
interrupts = <4 8>;
};
+&serialsc {
+ interrupts = <4 8>;
+};
+
&serial0 {
status = "okay";
};
@@ -76,7 +81,7 @@
};
&mdio {
- ethphy: ethphy@0 {
+ ethphy: ethernet-phy@0 {
reg = <0>;
};
};
diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi
b/arch/arm/dts/uniphier-pinctrl.dtsi
index bfdfb764b2..c0fd029b37 100644
--- a/arch/arm/dts/uniphier-pinctrl.dtsi
+++ b/arch/arm/dts/uniphier-pinctrl.dtsi
@@ -126,6 +126,11 @@
function = "nand";
};
+ pinctrl_pcie: pcie {
+ groups = "pcie";
+ function = "pcie";
+ };
+
pinctrl_sd: sd {
groups = "sd";
function = "sd";
diff --git a/arch/arm/dts/uniphier-pro4-ace.dts
b/arch/arm/dts/uniphier-pro4-ace.dts
index 64246fad32..27ff2b7b9d 100644
--- a/arch/arm/dts/uniphier-pro4-ace.dts
+++ b/arch/arm/dts/uniphier-pro4-ace.dts
@@ -87,7 +87,7 @@
};
&mdio {
- ethphy: ethphy@1 {
+ ethphy: ethernet-phy@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/uniphier-pro4-ref.dts
b/arch/arm/dts/uniphier-pro4-ref.dts
index 4967db58c5..3e1bc1275a 100644
--- a/arch/arm/dts/uniphier-pro4-ref.dts
+++ b/arch/arm/dts/uniphier-pro4-ref.dts
@@ -22,7 +22,7 @@
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
- serial3 = &serial3;
+ serial3 = &serialsc;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -43,6 +43,10 @@
interrupts = <2 8>;
};
+&serialsc {
+ interrupts = <2 8>;
+};
+
&serial0 {
status = "okay";
};
@@ -85,7 +89,7 @@
};
&mdio {
- ethphy: ethphy@0 {
+ ethphy: ethernet-phy@0 {
reg = <0>;
};
};
diff --git a/arch/arm/dts/uniphier-pro4-sanji.dts
b/arch/arm/dts/uniphier-pro4-sanji.dts
index 3b68a7c605..e7c122de29 100644
--- a/arch/arm/dts/uniphier-pro4-sanji.dts
+++ b/arch/arm/dts/uniphier-pro4-sanji.dts
@@ -25,6 +25,7 @@
i2c3 = &i2c3;
i2c5 = &i2c5;
i2c6 = &i2c6;
+ ethernet0 = ð
};
memory@80000000 {
@@ -81,7 +82,7 @@
};
&mdio {
- ethphy: ethphy@1 {
+ ethphy: ethernet-phy@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
index 8fc8433a3c..19848e36fa 100644
--- a/arch/arm/dts/uniphier-pro5.dtsi
+++ b/arch/arm/dts/uniphier-pro5.dtsi
@@ -465,40 +465,182 @@
};
};
- usb0: usb@65b00000 {
- compatible = "socionext,uniphier-pro5-dwc3";
+ usb0: usb@65a00000 {
+ compatible = "socionext,uniphier-dwc3", "snps,dwc3";
status = "disabled";
- reg = <0x65b00000 0x1000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ reg = <0x65a00000 0xcd00>;
+ interrupt-names = "host";
+ interrupts = <0 134 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>;
- dwc3@65a00000 {
- compatible = "snps,dwc3";
- reg = <0x65a00000 0x10000>;
- interrupts = <0 134 4>;
- dr_mode = "host";
- tx-fifo-resize;
- };
+ clock-names = "ref", "bus_early", "suspend";
+ clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
+ resets = <&usb0_rst 15>;
+ phys = <&usb0_hsphy0>, <&usb0_ssphy0>;
+ dr_mode = "host";
};
- usb1: usb@65d00000 {
- compatible = "socionext,uniphier-pro5-dwc3";
- status = "disabled";
- reg = <0x65d00000 0x1000>;
+ usb-glue@65b00000 {
+ compatible = "socionext,uniphier-pro5-dwc3-glue",
+ "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
- ranges;
+ ranges = <0 0x65b00000 0x400>;
+
+ usb0_rst: reset@0 {
+ compatible =
"socionext,uniphier-pro5-usb3-reset";
+ reg = <0x0 0x4>;
+ #reset-cells = <1>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ };
+
+ usb0_vbus0: regulator@100 {
+ compatible =
"socionext,uniphier-pro5-usb3-regulator";
+ reg = <0x100 0x10>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ };
+
+ usb0_hsphy0: hs-phy@280 {
+ compatible =
"socionext,uniphier-pro5-usb3-hsphy";
+ reg = <0x280 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ vbus-supply = <&usb0_vbus0>;
+ };
+
+ usb0_ssphy0: ss-phy@380 {
+ compatible =
"socionext,uniphier-pro5-usb3-ssphy";
+ reg = <0x380 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 14>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 14>;
+ vbus-supply = <&usb0_vbus0>;
+ };
+ };
+
+ usb1: usb@65c00000 {
+ compatible = "socionext,uniphier-dwc3", "snps,dwc3";
+ status = "disabled";
+ reg = <0x65c00000 0xcd00>;
+ interrupt-names = "host";
+ interrupts = <0 137 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>;
- dwc3@65c00000 {
- compatible = "snps,dwc3";
- reg = <0x65c00000 0x10000>;
- interrupts = <0 137 4>;
- dr_mode = "host";
- tx-fifo-resize;
+ clock-names = "ref", "bus_early", "suspend";
+ clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
+ resets = <&usb1_rst 15>;
+ phys = <&usb1_hsphy0>, <&usb1_hsphy1>, <&usb1_ssphy0>;
+ dr_mode = "host";
+ };
+
+ usb-glue@65d00000 {
+ compatible = "socionext,uniphier-pro5-dwc3-glue",
+ "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x65d00000 0x400>;
+
+ usb1_rst: reset@0 {
+ compatible =
"socionext,uniphier-pro5-usb3-reset";
+ reg = <0x0 0x4>;
+ #reset-cells = <1>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
};
+
+ usb1_vbus0: regulator@100 {
+ compatible =
"socionext,uniphier-pro5-usb3-regulator";
+ reg = <0x100 0x10>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ };
+
+ usb1_vbus1: regulator@110 {
+ compatible =
"socionext,uniphier-pro5-usb3-regulator";
+ reg = <0x110 0x10>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ };
+
+ usb1_hsphy0: hs-phy@280 {
+ compatible =
"socionext,uniphier-pro5-usb3-hsphy";
+ reg = <0x280 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ vbus-supply = <&usb1_vbus0>;
+ };
+
+ usb1_hsphy1: hs-phy@290 {
+ compatible =
"socionext,uniphier-pro5-usb3-hsphy";
+ reg = <0x290 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ vbus-supply = <&usb1_vbus1>;
+ };
+
+ usb1_ssphy0: ss-phy@380 {
+ compatible =
"socionext,uniphier-pro5-usb3-ssphy";
+ reg = <0x380 0x10>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 15>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 15>;
+ vbus-supply = <&usb1_vbus0>;
+ };
+ };
+
+ pcie_ep: pcie-ep@66000000 {
+ compatible = "socionext,uniphier-pro5-pcie-ep",
+ "snps,dw-pcie-ep";
+ status = "disabled";
+ reg-names = "dbi", "dbi2", "link", "addr_space";
+ reg = <0x66000000 0x1000>, <0x66001000 0x1000>,
+ <0x66010000 0x10000>, <0x67000000 0x400000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 24>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 24>;
+ num-ib-windows = <16>;
+ num-ob-windows = <16>;
+ num-lanes = <4>;
+ phy-names = "pcie-phy";
+ phys = <&pcie_phy>;
+ };
+
+ pcie_phy: phy@66038000 {
+ compatible = "socionext,uniphier-pro5-pcie-phy";
+ reg = <0x66038000 0x4000>;
+ #phy-cells = <0>;
+ clock-names = "gio", "link";
+ clocks = <&sys_clk 12>, <&sys_clk 24>;
+ reset-names = "gio", "link";
+ resets = <&sys_rst 12>, <&sys_rst 24>;
};
nand: nand-controller@68000000 {
diff --git a/arch/arm/dts/uniphier-pxs2-gentil.dts
b/arch/arm/dts/uniphier-pxs2-gentil.dts
index 8e9ac579aa..759384b606 100644
--- a/arch/arm/dts/uniphier-pxs2-gentil.dts
+++ b/arch/arm/dts/uniphier-pxs2-gentil.dts
@@ -87,7 +87,7 @@
};
&mdio {
- ethphy: ethphy@1 {
+ ethphy: ethernet-phy@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/uniphier-pxs2-vodka.dts
b/arch/arm/dts/uniphier-pxs2-vodka.dts
index 8eacc7bdec..7e08a459f7 100644
--- a/arch/arm/dts/uniphier-pxs2-vodka.dts
+++ b/arch/arm/dts/uniphier-pxs2-vodka.dts
@@ -88,7 +88,7 @@
};
&mdio {
- ethphy: ethphy@1 {
+ ethphy: ethernet-phy@1 {
reg = <1>;
};
};
diff --git a/arch/arm/dts/uniphier-pxs3-ref.dts
b/arch/arm/dts/uniphier-pxs3-ref.dts
index 1dacbf4fb0..1a80cd91d2 100644
--- a/arch/arm/dts/uniphier-pxs3-ref.dts
+++ b/arch/arm/dts/uniphier-pxs3-ref.dts
@@ -19,7 +19,7 @@
aliases {
serial0 = &serial0;
- serial1 = &serial1;
+ serial1 = &serialsc;
serial2 = &serial2;
serial3 = &serial3;
i2c0 = &i2c0;
@@ -43,6 +43,10 @@
interrupts = <4 8>;
};
+&serialsc {
+ interrupts = <4 8>;
+};
+
&spi0 {
status = "okay";
};
@@ -97,7 +101,7 @@
};
&mdio0 {
- ethphy0: ethphy@0 {
+ ethphy0: ethernet-phy@0 {
reg = <0>;
};
};
@@ -108,7 +112,7 @@
};
&mdio1 {
- ethphy1: ethphy@0 {
+ ethphy1: ethernet-phy@0 {
reg = <0>;
};
};
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index bf3b1eae87..c4344926d9 100644
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -871,7 +871,9 @@
compatible = "socionext,uniphier-pxs3-pcie-phy";
reg = <0x66038000 0x4000>;
#phy-cells = <0>;
+ clock-names = "link";
clocks = <&sys_clk 24>;
+ reset-names = "link";
resets = <&sys_rst 24>;
socionext,syscon = <&soc_glue>;
};
diff --git a/arch/arm/dts/uniphier-sld8-ref.dts
b/arch/arm/dts/uniphier-sld8-ref.dts
index 01bf94c6b9..22898df39c 100644
--- a/arch/arm/dts/uniphier-sld8-ref.dts
+++ b/arch/arm/dts/uniphier-sld8-ref.dts
@@ -20,7 +20,7 @@
aliases {
serial0 = &serial0;
- serial1 = &serial1;
+ serial1 = &serialsc;
serial2 = &serial2;
serial3 = &serial3;
i2c0 = &i2c0;
@@ -39,6 +39,10 @@
interrupts = <0 8>;
};
+&serialsc {
+ interrupts = <0 8>;
+};
+
&serial0 {
status = "okay";
};
diff --git a/arch/arm/dts/uniphier-support-card.dtsi
b/arch/arm/dts/uniphier-support-card.dtsi
index bf441c2eff..444802fee9 100644
--- a/arch/arm/dts/uniphier-support-card.dtsi
+++ b/arch/arm/dts/uniphier-support-card.dtsi
@@ -8,26 +8,19 @@
&system_bus {
status = "okay";
ranges = <1 0x00000000 0x42000000 0x02000000>;
+ interrupt-parent = <&gpio>;
- support_card: support-card@1,1f00000 {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x00000000 1 0x01f00000 0x00100000>;
- interrupt-parent = <&gpio>;
-
- ethsc: ethernet@0 {
- compatible = "smsc,lan9118", "smsc,lan9115";
- reg = <0x00000000 0x1000>;
- phy-mode = "mii";
- reg-io-width = <4>;
- };
+ ethsc: ethernet@1,1f00000 {
+ compatible = "smsc,lan9118", "smsc,lan9115";
+ reg = <1 0x01f00000 0x1000>;
+ phy-mode = "mii";
+ reg-io-width = <4>;
+ };
- serialsc: uart@b0000 {
- compatible = "ns16550a";
- reg = <0x000b0000 0x20>;
- clock-frequency = <12288000>;
- reg-shift = <1>;
- };
+ serialsc: serial@1,1fb0000 {
+ compatible = "ns16550a";
+ reg = <1 0x01fb0000 0x20>;
+ clock-frequency = <12288000>;
+ reg-shift = <1>;
};
};
--
2.25.1
