>-Original Message-
>From: Heinrich Schuchardt
>Sent: 04 August 2020 02:40
>To: Rick Chen
>Cc: Pragnesh Patel ; Bin Meng
>; u-boot@lists.denx.de; Heinrich Schuchardt
>
>Subject: [PATCH 1/1] riscv: sifive: fu540: redundant initialization
>
>[External Email] Do not click links or
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-ld11-global.dts | 2 +-
arch/arm/dts/uniphier-ld11-ref.dts | 8 +-
arch/arm/dts/uniphier-ld20-global.dts | 2 +-
arch/arm/dts/uniphier-ld20-ref.dts | 8 +-
arch/arm/dts/uniphier-ld20.dtsi | 2 +
When you enable CONFIG_OF_LIVE, you will end up with a lot of
conversions.
To help this tedious work, this commit converts devfdt_get_addr_ptr()
to dev_read_addr_ptr() by coccinelle. I also removed redundant casts
because dev_read_addr_ptr() returns an opaque pointer.
To generate this commit, I
It is strange to use devfdt_get_addr_ptr(), then cast the pointer
back to uint32 because you could use devfdt_get_addr() without casting.
Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE.
Signed-off-by: Masahiro Yamada
---
drivers/gpio/at91_gpio.c | 2 +-
1 file changed, 1
It is strange to use devfdt_get_addr_ptr(), then cast the pointer
back to ulong because you could use devfdt_get_addr() without casting.
Convert it to dev_read_addr(), which is capable to CONFIG_OF_LIVE.
Signed-off-by: Masahiro Yamada
---
drivers/ata/ahci_mvebu.c | 2 +-
1 file changed, 1
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Monday, August 03, 2020 2:09 PM
> To: Rick Jian-Zhi Chen(陳建志); Pragnesh Patel; U-Boot Mailing List
> Cc: Bin Meng
> Subject: [PATCH 2/6] riscv: sifive/fu540: spl: Drop our own version of
> board_init_f()
>
> From: Bin Meng
>
> Use the generic
> From: Bin Meng [mailto:bmeng...@gmail.com]
> Sent: Monday, August 03, 2020 2:09 PM
> To: Rick Jian-Zhi Chen(陳建志); Pragnesh Patel; U-Boot Mailing List
> Cc: Bin Meng
> Subject: [PATCH 1/6] riscv: Call spl_board_init_f() in the generic SPL
> board_init_f()
>
> From: Bin Meng
>
> The generic SPL
Fix for the case of a U-Boot configuration with CONFIG_SPL,
CONFIG_I2C_MUX, CONFIG_I2C_MUX_PCA954x, no CONFIG_SPL_DM and no
CONFIG_SPL_I2C_MUX. Without this fix linking of pca954x fails because
dm_write_i2c does not exist because CONFIG_SPL_DM is not defined.
Signed-off-by: Kees Trommel
Cc:
Hi Simon.
> On Aug 3, 2020, at 11:01 AM, Simon Glass wrote:
>
>
> Hi Tom,
>
> On Fri, 31 Jul 2020 at 12:54, Tom Rini wrote:
>>
>> On Fri, Jul 31, 2020 at 12:43:59PM -0600, Simon Glass wrote:
>>
>>> Hi Tom,
>>>
>>> I do see some progress with PowerPC migration but it seems to be very
>>>
On Mon, Aug 03, 2020 at 06:57:05PM -0400, Tom Rini wrote:
> On Fri, Jul 17, 2020 at 09:03:17PM -0600, Simon Glass wrote:
>
> > Drop use of the preprocessor where possible.
> >
> > Signed-off-by: Simon Glass
> [snip]
> > + if (IS_ENABLED(CONFIG_DM_VIDEO)) {
> > + /*
> > +
Hi Marty,
On Mon, 3 Aug 2020 at 07:49, Simon Glass wrote:
>
> Hi Marty,
>
> On Sun, 2 Aug 2020 at 21:02, Simon Glass wrote:
> >
> > Hi Marty,
> >
> > On Fri, 31 Jul 2020 at 12:30, Simon Glass wrote:
> > >
> > > Hi Marty,
> > >
> > > On Fri, 31 Jul 2020 at 05:19, Marty E. Plummer
> > > wrote:
Hi Tom,
Please pull some riscv updates:
- add DM based reset driver for SiFive SoC's.
Thanks
Rick
https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/714339244
The following changes since commit 68941e3b2c217907a49aa66af8bb65729b913397:
Merge
On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea
wrote:
>
> Clock re-parenting is not binding the clock's device to its new
> parent device, it only calls the clock's ops->set_parent() API. The
> changes in this commit re-parent the clock device to its new parent
> so that subsequent operations like
Hi Claudiu,
On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea
wrote:
>
> Check hw and hw->dev before dereference it.
>
> Signed-off-by: Claudiu Beznea
> ---
> drivers/clk/clk.c | 3 +++
> 1 file changed, 3 insertions(+)
>
Why is this needed? It adds to code size and these situations should
not
On Tue, 28 Jul 2020 at 01:13, Patrice Chotard wrote:
>
> Initial implementation invokes device_bind_with_driver_data()
> with driver_data parameter equal to 0.
> For driver with driver data, the bind command can't bind
> correctly this driver or even worse causes data abort as shown below:
>
> As
On Tue, 28 Jul 2020 at 01:13, Patrice Chotard wrote:
>
> Usage of lists_bind_fdt() in bind command imposes to add
> a compatible string for bind-test node.
>
> Others impacts are:
> - bind-test node is binded at sandbox start, so no need to bind it
> in test_bind_unbind_with_node() test.
>
Hi Claudiu,
On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea
wrote:
>
> In common clock framework the relation b/w parent and child clocks is
> determined based on the udevice parent/child information. A clock
> parent could be changed based on devices needs. In case this is happen
> the
On Mon, 3 Aug 2020 at 14:12, Heinrich Schuchardt wrote:
>
> (A && A == 0x20) is only true for (A == 0x20).
>
> Signed-off-by: Heinrich Schuchardt
> ---
> post/post.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Simon Glass
Hi Claudiu,
On Wed, 29 Jul 2020 at 08:51, Claudiu Beznea
wrote:
>
> Check pointer returned by dev_get_parent().
>
> Signed-off-by: Claudiu Beznea
> ---
> drivers/clk/clk-uclass.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
>
Hi Dennis,
On Mon, 3 Aug 2020 at 11:08, Dennis Gilmore wrote:
>
> Simon,
>
> Is there a way to replace the firmware on those boards with u-boot? I
> have a Tegra, a rockchip, and a pair of Samsung Exynos based
> Chromebooks that are end of life for ChromeOS but are still quite
> useful hardware
On Mon, 3 Aug 2020 at 13:21, Ovidiu Panait wrote:
>
> According to the description of devfdt_get_addr_ptr, this function should
> return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE.
>
> Fix this by making devfdt_get_addr_ptr return NULL on failure, as
> described in the
Hi Claudiu,
On Wed, 29 Jul 2020 at 08:52, Claudiu Beznea
wrote:
>
> clk_get_by_indexed_prop() retrieves a clock with dev member being set
> with the pointer to the udevice for the clock controller driver. But
> in case of CCF each struct clk object has set in dev member the reference
> to its
On Mon, 3 Aug 2020 at 13:21, Ovidiu Panait wrote:
>
> Add flat tree test case to cover devfdt_get_addr_ptr function.
>
> Signed-off-by: Ovidiu Panait
> ---
>
> test/dm/test-fdt.c | 18 ++
> 1 file changed, 18 insertions(+)
Reviewed-by: Simon Glass
Hi Heinrich,
On Wed, 29 Jul 2020 at 09:43, Heinrich Schuchardt wrote:
>
> In our Python tests we expect to see the word "resetting". It may be
> truncated if we reset before the serial console buffer is transferred.
>
> Wait for 100 ms between the "resetting ..." message and the actual reset
>
On Tue, 28 Jul 2020 at 01:13, Patrice Chotard wrote:
>
> Add documentation in doc/drivel-model for the bind/unbind command.
> Part of this documentation is extracted from original patch commit
> message:
> commit 49c752c93a78 ("cmd: Add bind/unbind commands to bind a device to a
> driver from
On Tue, 28 Jul 2020 at 09:56, Heinrich Schuchardt wrote:
>
> We currently print the memory size with at least 8 hexadecimal digits.
> This creates a ragged output on 64 bit boards, e.g. on a Kendryte K210:
>
> DRAM bank = 0x0002
> -> start= 0x8060
> -> size =
On Wed, 29 Jul 2020 at 08:52, Claudiu Beznea
wrote:
>
> Do not disable clock if it is a critical one.
>
> Signed-off-by: Claudiu Beznea
> ---
> drivers/clk/clk-uclass.c | 3 +++
> 1 file changed, 3 insertions(+)
Reviewed-by: Simon Glass
Please add a sandbox test
>
> diff --git
On Fri, 24 Jul 2020 at 05:17, Ovidiu Panait wrote:
>
> Move all assignments to gd->bd->bi_mem{start,size} to generic code in
> setup_bdinfo.
>
> Xtensa architecture is special in this regard as it defines its own
> handling of gd->bd->bi_mem{start,size} fields. In order to avoid defining
> a weak
On Mon, 3 Aug 2020 at 15:26, Heinrich Schuchardt wrote:
>
> Building with CONFIG_SPL_SMP=n results in:
>
> arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’:
> arch/riscv/lib/spl.c:33:6:
> error: unused variable ‘ret’ [-Werror=unused-variable]
>33 | int ret;
> | ^~~
>
>
Hi Pratyush,
On Mon, 3 Aug 2020 at 05:34, Pratyush Yadav wrote:
>
> Hi Simon,
>
> On 16/06/20 09:12PM, Simon Glass wrote:
> > Hi Pratyush,
> >
> > On Thu, 11 Jun 2020 at 13:45, Pratyush Yadav wrote:
> > >
> > > initr_dm_devices() is called somewhere after board_init(). It can be
> > > used by
On Tue, Aug 4, 2020 at 5:33 AM Heinrich Schuchardt wrote:
>
Please remove the ending period in the commit title
> After
>
> if (ret) return ret;
>
> we know that ret is zero. Don't check it again.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/lib/andes_plic.c | 2 +-
> 1 file
On Tue, Aug 4, 2020 at 5:26 AM Heinrich Schuchardt wrote:
>
> Building with CONFIG_SPL_SMP=n results in:
>
> arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’:
> arch/riscv/lib/spl.c:33:6:
> error: unused variable ‘ret’ [-Werror=unused-variable]
>33 | int ret;
> | ^~~
>
>
On Tue, Aug 4, 2020 at 5:10 AM Heinrich Schuchardt wrote:
>
> We should not initialize a variable if the value is overwritten before
> being read.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/cpu/fu540/cache.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by:
On Sun, Aug 2, 2020 at 9:26 PM Bin Meng wrote:
>
> Hi Atish,
>
> On Thu, Jul 30, 2020 at 5:43 AM Atish Patra wrote:
> >
> > Hi,
> > The latest master (423e08cb7701 (origin/master, origin/HEAD) Merge
> > branch '2020-07-28-misc-soc-improvements') seems to be broken for
> > HiFive Unleashed.
> >
>
Hi Stefan,
On Thu, Jul 30, 2020 at 4:58 AM Stefan Roese wrote:
>
> From: Suneel Garapati
>
> Adds support for SPI controllers found on Octeon II/III and Octeon TX
> TX2 SoC platforms.
>
> Signed-off-by: Aaron Williams
> Signed-off-by: Suneel Garapati
> Signed-off-by: Stefan Roese
> Cc:
On Fri, Jul 17, 2020 at 09:03:17PM -0600, Simon Glass wrote:
> Drop use of the preprocessor where possible.
>
> Signed-off-by: Simon Glass
[snip]
> + if (IS_ENABLED(CONFIG_DM_VIDEO)) {
> + /*
> + * If the console setting is not in environment variables then
> +
Hello all,
I am working on enabling a POST-based memory test for an ARM-based processor.
I have defined CONFIG_POST CONFIG_SYS_POST_MEMORY in include/configs/.h;
I have also defined CONFIG_POST_EXTERNAL_WORD_FUNCS and wrote some external
word functions. U-Boot builds with no errors and works
Hi Michael,
On Tue, Aug 04, 2020 at 12:16:33AM +0200, Michael Walle wrote:
> The fdt_fixup_pcie_ls() scans all PCI devices and assumes that all PCI
> root devices are layerscape PCIe controllers. Unfortunately, this is not
> true for the LS1028A. There is one additional static PCI root complex
>
The fdt_fixup_pcie_ls() scans all PCI devices and assumes that all PCI
root devices are layerscape PCIe controllers. Unfortunately, this is not
true for the LS1028A. There is one additional static PCI root complex
(this contains the networking devices) which has nothing to do with the
layerscape
After
if (ret) return ret;
we know that ret is zero. Don't check it again.
Signed-off-by: Heinrich Schuchardt
---
arch/riscv/lib/andes_plic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c
index
Building with CONFIG_SPL_SMP=n results in:
arch/riscv/lib/spl.c: In function ‘jump_to_image_no_args’:
arch/riscv/lib/spl.c:33:6:
error: unused variable ‘ret’ [-Werror=unused-variable]
33 | int ret;
| ^~~
Define the variable ret as __maybe_unused.
Fixes: 191636e44898 ("riscv:
On 03.08.20 15:45, Anatolij Gustschin wrote:
> Since commit 7812bbdc3732 ("video: Correctly handle multiple
> framebuffers") the vidconsole output is missing on the primary
> display on boards with two IPU units (all i.MX6Q/D based boards).
> The base address of the allocated framebuffer is not
We should not initialize a variable if the value is overwritten before
being read.
Signed-off-by: Heinrich Schuchardt
---
arch/riscv/cpu/fu540/cache.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/cpu/fu540/cache.c b/arch/riscv/cpu/fu540/cache.c
index
On 8/3/20 8:24 PM, Brownlie, Lewis wrote:
> Hello all,
>
> I am working on enabling a POST-based memory test for an ARM-based processor.
> I have defined CONFIG_POST CONFIG_SYS_POST_MEMORY in
> include/configs/.h; I have also defined
> CONFIG_POST_EXTERNAL_WORD_FUNCS and wrote some external
Hi Tom,
please pull some Octeon MIPS64 updates for 2020.10. This contains just
new GPIO, CLK ad SPI drivers for Octeon as well as the according DT and
defconfig updates.
Gitlab CI:
https://gitlab.denx.de/u-boot/custodians/u-boot-mips/pipelines/4316
The following changes since commit
(A && A == 0x20) is only true for (A == 0x20).
Signed-off-by: Heinrich Schuchardt
---
post/post.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/post/post.c b/post/post.c
index 6687e0b75c..0f1fe8d905 100644
--- a/post/post.c
+++ b/post/post.c
@@ -189,7 +189,7 @@ static void
According to the description of devfdt_get_addr_ptr, this function should
return NULL on failure, but currently it returns (void *)FDT_ADDR_T_NONE.
Fix this by making devfdt_get_addr_ptr return NULL on failure, as
described in the function comments. Also, update the drivers currently
checking
Add flat tree test case to cover devfdt_get_addr_ptr function.
Signed-off-by: Ovidiu Panait
---
test/dm/test-fdt.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index 8ef7c7a88e..fc089684ac 100644
--- a/test/dm/test-fdt.c
+++
> From: Suneel Garapati
>
> Add support for GPIO controllers found on Octeon II/III and Octeon TX
> TX2 SoC platforms.
>
> Signed-off-by: Aaron Williams
> Signed-off-by: Suneel Garapati
> Signed-off-by: Stefan Roese
> Reviewed-by: Simon Glass
>
> ---
>
> (no changes since v2)
>
>
Am Donnerstag, den 30.07.2020, 13:56 +0200 schrieb Stefan Roese:
> From: Suneel Garapati
>
> Adds support for SPI controllers found on Octeon II/III and Octeon TX
> TX2 SoC platforms.
>
> Signed-off-by: Aaron Williams
> Signed-off-by: Suneel Garapati
> Signed-off-by: Stefan Roese
> Cc:
> Correct the make commands for the defconfigs.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> doc/board/emulation/qemu-mips.rst | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
>
applied to u-boot-mips, thanks.
--
- Daniel
On 03.08.20 16:08, Sean Anderson wrote:
> On 8/3/20 9:59 AM, Heinrich Schuchardt wrote:
>> On 03.08.20 12:10, Sean Anderson wrote:
>>> On 8/2/20 11:29 PM, Bin Meng wrote:
On Tue, Jul 28, 2020 at 11:52 PM Heinrich Schuchardt
wrote:
>
> The kendryte PLL code uses nop as barrier.
Hi Wolfgang,
On Fri, 31 Jul 2020 at 05:44, Wolfgang Wallner
wrote:
>
> Hi Simon,
>
> while trying out your ACPI patches I tried to compile
> chromebook_coral_defconfig
> as a reference. Building this defconfig fails for multiple definitions
> of "_X86EMU_env":
>
> $ git checkout v2020.07
> $
Hi Tom,
On Fri, 31 Jul 2020 at 12:54, Tom Rini wrote:
>
> On Fri, Jul 31, 2020 at 12:43:59PM -0600, Simon Glass wrote:
>
> > Hi Tom,
> >
> > I do see some progress with PowerPC migration but it seems to be very
> > behind. I notice that it is often PowerPC code that gets in the way or
> >
On Mon, Aug 03, 2020 at 10:57:21AM -0600, Stephen Warren wrote:
> On 8/3/20 9:51 AM, Tom Rini wrote:
> > On Mon, Aug 03, 2020 at 09:43:18AM -0600, Stephen Warren wrote:
> >> On 7/28/20 3:51 AM, Patrick Delaunay wrote:
> >>> Add basic test to persistent environment in ext4:
> >>> save and load in
Simon,
Is there a way to replace the firmware on those boards with u-boot? I
have a Tegra, a rockchip, and a pair of Samsung Exynos based
Chromebooks that are end of life for ChromeOS but are still quite
useful hardware platforms if there was a way to replace entirely the
bootloader with u-boot
On 8/3/20 9:51 AM, Tom Rini wrote:
> On Mon, Aug 03, 2020 at 09:43:18AM -0600, Stephen Warren wrote:
>> On 7/28/20 3:51 AM, Patrick Delaunay wrote:
>>> Add basic test to persistent environment in ext4:
>>> save and load in host ext4 file 'uboot.env'.
>>>
>>> On first execution an empty EXT4 file
On Mon, Aug 03, 2020 at 12:27:36PM +0800, Bin Meng wrote:
> Hi Tom,
>
> This PR includes the following x86 changes for v2020.10:
>
> - ApolloLake: add u64 parameters support for FSP2 bindings
> - ApolloLake: add missing parameters to support full configuration of
> the latest FSP
> MR6 release
On Mon, Aug 03, 2020 at 09:43:18AM -0600, Stephen Warren wrote:
> On 7/28/20 3:51 AM, Patrick Delaunay wrote:
> > Add basic test to persistent environment in ext4:
> > save and load in host ext4 file 'uboot.env'.
> >
> > On first execution an empty EXT4 file system is created in
> > persistent
On 7/28/20 3:51 AM, Patrick Delaunay wrote:
> Add basic test to persistent environment in ext4:
> save and load in host ext4 file 'uboot.env'.
>
> On first execution an empty EXT4 file system is created in
> persistent data dir: env.ext4.img.
> diff --git a/test/py/tests/test_env.py
HiAnatolij,
On 03.08.20 15:54, Anatolij Gustschin wrote:
> Hi,
>
> On Sat, 1 Aug 2020 21:14:10 +0200
> Soeren Moch sm...@web.de wrote:
>
>> Hi,
>>
>> unfortunately the patch [1] is only the first part to get DM_VIDEO
>> running properly on tbs2910 for u-boot-2020.10. With this, I get a valid
>>
On 03.08.20 17:05, Stefano Babic wrote:
> On 03.08.20 17:03, Stefano Babic wrote:
>> Hi Mani,
>>
>> On 29.07.20 07:05, Manivannan Sadhasivam wrote:
>>> This commit adds initial board support for iMX8QXP AI_ML board from
>>> Einfochips. This board is one of the 96Boards Consumer Edition and AI
>>>
On 03.08.20 17:03, Stefano Babic wrote:
> Hi Mani,
>
> On 29.07.20 07:05, Manivannan Sadhasivam wrote:
>> This commit adds initial board support for iMX8QXP AI_ML board from
>> Einfochips. This board is one of the 96Boards Consumer Edition and AI
>> boards of the 96Boards family based on i.MX8QXP
Hi Mani,
On 29.07.20 07:05, Manivannan Sadhasivam wrote:
> This commit adds initial board support for iMX8QXP AI_ML board from
> Einfochips. This board is one of the 96Boards Consumer Edition and AI
> boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale.
>
> This initial
On Mon, Aug 03, 2020 at 01:52:19PM +0200, Robert Marko wrote:
> Fixup the Linux FDT with the detection of onboard DRAM as
> provided by SBL (Secondary boot loader) by reading
> the shared-memory region.
>
> Imported from Snapdragon target.
>
> Signed-off-by: Robert Marko
> Cc: Luka Perkov
>
On Sat, Aug 01, 2020 at 05:41:52PM +0200, Heinrich Schuchardt wrote:
> Dear Tom,
>
> the following changes since commit a2d051e7b6a8f87add1067d936bb0c805a47b0df:
>
> Merge branch '2020-07-31-more-env-updates' (2020-07-31 10:13:07 -0400)
>
> are available in the Git repository at:
>
>
On 8/3/20 9:59 AM, Heinrich Schuchardt wrote:
> On 03.08.20 12:10, Sean Anderson wrote:
>> On 8/2/20 11:29 PM, Bin Meng wrote:
>>> On Tue, Jul 28, 2020 at 11:52 PM Heinrich Schuchardt
>>> wrote:
The kendryte PLL code uses nop as barrier. The macro is not defined for
the sandbox on
On 03.08.20 12:10, Sean Anderson wrote:
> On 8/2/20 11:29 PM, Bin Meng wrote:
>> On Tue, Jul 28, 2020 at 11:52 PM Heinrich Schuchardt
>> wrote:
>>>
>>> The kendryte PLL code uses nop as barrier. The macro is not defined for
>>> the sandbox on x86 but is defined on RISC-V.
>>
>> Is this kendryte
Hi,
On Sat, 1 Aug 2020 21:14:10 +0200
Soeren Moch sm...@web.de wrote:
> Hi,
>
> unfortunately the patch [1] is only the first part to get DM_VIDEO
> running properly on tbs2910 for u-boot-2020.10. With this, I get a valid
> video output signal, but no actual video console output, only a blank
>
Hi Marty,
On Sun, 2 Aug 2020 at 21:02, Simon Glass wrote:
>
> Hi Marty,
>
> On Fri, 31 Jul 2020 at 12:30, Simon Glass wrote:
> >
> > Hi Marty,
> >
> > On Fri, 31 Jul 2020 at 05:19, Marty E. Plummer
> > wrote:
> > >
> > > On Tue, Jul 28, 2020 at 12:58:30PM -0600, Simon Glass wrote:
> > > > Hi
Since commit 7812bbdc3732 ("video: Correctly handle multiple
framebuffers") the vidconsole output is missing on the primary
display on boards with two IPU units (all i.MX6Q/D based boards).
The base address of the allocated framebuffer is not correctly
programmed in the display controller. Fix it.
Hi Patrick,
On 23.07.2020 18:32, Patrick DELAUNAY wrote:
> Hi Marek,
>
>> From: U-Boot On Behalf Of Tom Rini
>> Sent: vendredi 10 juillet 2020 22:22
>>
>> On Wed, Jun 03, 2020 at 02:43:42PM +0200, Marek Szyprowski wrote:
>>
>>> Provide function for setting arbitrary virtual-physical MMU mapping
Fixup the Linux FDT with the detection of onboard DRAM as
provided by SBL (Secondary boot loader) by reading
the shared-memory region.
Imported from Snapdragon target.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/mach-ipq40xx/Makefile| 1 +
There is already existing driver for SMEM so lets enable it for IPQ40xx as well.
Signed-off-by: Robert Marko
Cc: Luka Perkov
---
arch/arm/Kconfig | 2 ++
arch/arm/dts/qcom-ipq4019.dtsi | 5 +
drivers/smem/Kconfig | 2 +-
3 files changed, 8 insertions(+), 1
Switch DTB provider form OF_EMBED to OF_SEPARATE
to avoid the compile warning message:
WARNING ==
CONFIG_OF_EMBED is enabled. This option should only
be used for debugging purposes. Please use
CONFIG_OF_SEPARATE for boards in mainline.
See
Same problem as here:
https://lists.denx.de/pipermail/u-boot/2020-February/400350.html
SPL read zeros, but u-boot works fine.
for Cubietruck sun7i-A20 with HYNIX NAND MLC - H27UCG8T2BTR-BC.
regards
Zahari Zahariev
The hardcoded platform variables such as DRAM base address are not
common to Aspeed SoCs AST24xx/AST25xx/AST26xx. This patch replaces
those hardcoded with macros defined in a newly added header, where
the basic SoC HW information are assigned accordingly.
Signed-off-by: Chia-Wei, Wang
---
Move the BOOTCOMMAND definition from the board inclusion
header to the default configuration file.
Signed-off-by: Chia-Wei, Wang
---
configs/evb-ast2500_defconfig | 4 +++-
include/configs/aspeed-common.h | 2 --
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git
Hello,
Reading
https://chromium.googlesource.com/chromiumos/docs/+/master/developer_mode.md,
it appears U-Boot should work as an alternate firmware on new ARM
Chromebooks.
Trying on my Duet (Kukui/Krane), this doesn't work. Looking at the
RW_LEGACY contents, there's basically nothing there from
The original lowlevel_init function of AST2500 is written
in C. However, the C runtime environment is not ready until
_main execution.
This patch adds the assembly version of the lowlevel_init
function. Additional initialization to DRAM configuration
and LPC reset source are also added.
Update maintainers for Aspeed SoC platforms.
Signed-off-by: Chia-Wei, Wang
---
MAINTAINERS | 12
1 file changed, 12 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 889a73f15f..163f571f65 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -148,6 +148,18 @@ F:
This patch series refactors the existing Aspeed platform
code and file/folder structure for better flexibility to
extend the support of other Aspeed SoCs. The maintainers
for Aspeed SoCs are also added.
Chia-Wei, Wang (6):
MAINTAINERS: Add maintainers for Aspeed SoCs
aspeed: ast2500: Add
Rename the ast2500-board.c to board_common.c and
place the renamed file under the ast2500 folder.
Signed-off-by: Chia-Wei, Wang
---
arch/arm/mach-aspeed/Makefile | 2 +-
arch/arm/mach-aspeed/ast2500/Makefile | 1 +
Hi Simon,
On 16/06/20 09:12PM, Simon Glass wrote:
> Hi Pratyush,
>
> On Thu, 11 Jun 2020 at 13:45, Pratyush Yadav wrote:
> >
> > initr_dm_devices() is called somewhere after board_init(). It can be
> > used by drivers to initialize devices to some default bootup state.
> > Those devices might
On 8/2/20 11:29 PM, Bin Meng wrote:
> On Tue, Jul 28, 2020 at 11:52 PM Heinrich Schuchardt
> wrote:
>>
>> The kendryte PLL code uses nop as barrier. The macro is not defined for
>> the sandbox on x86 but is defined on RISC-V.
>
> Is this kendryte PLL driver built for Sandbox?
Yes. I added a
Hello,
On Fri, 2020-07-31 at 14:00 +0900, AKASHI Takahiro wrote:
> On Mon, Jul 20, 2020 at 02:02:10PM +0300, Anastasiia Lukianenko
> wrote:
> > From: Andrii Anisov
> >
> > Introduce a minimal Xen guest board running as a virtual
> > machine under Xen Project's hypervisor [1], [2].
> >
> > Part
On Wed, Jul 15, 2020 at 4:54 PM Doyle, Patrick wrote:
>
>
>
> In the unlikely event that both blocks 10 and 11 are marked as bad (on a
> 32 bit machine), then the process of marking block 10 as bad stomps on
> cached entry for block 11. There are (of course) other examples.
>
> Signed-off-by:
On 7/31/20 7:47 PM, Marek Vasut wrote:
> On 7/31/20 9:45 AM, Patrice Chotard wrote:
>> node varaible is used as iterator into ofnode_for_each_subnode()
>> loop, when exiting of it, node is no more a valid ofnode.
>> Use dwc3_node instead as parameter of ofnode_valid()
>>
>> Fixes: ac28e59a574d
From: Bin Meng
Use the generic board_init_f() provided by the RISC-V library codes.
Signed-off-by: Bin Meng
---
board/sifive/fu540/spl.c | 19 +--
1 file changed, 1 insertion(+), 18 deletions(-)
diff --git a/board/sifive/fu540/spl.c b/board/sifive/fu540/spl.c
index
From: Bin Meng
This option was enabled during the earlier U-Boot porting time. Now
we already have the OTP driver in place and the unique MAC address
is read from the OTP, there is no need to turn on this option.
Signed-off-by: Bin Meng
---
board/sifive/fu540/Kconfig | 1 -
1 file changed, 1
From: Bin Meng
spl_soc_init() seems to be a better name, as all SPL functions
names start from the spl_ prefix.
Signed-off-by: Bin Meng
---
arch/riscv/cpu/fu540/spl.c | 2 +-
arch/riscv/include/asm/arch-fu540/spl.h | 2 +-
board/sifive/fu540/spl.c| 2 +-
3 files
From: Bin Meng
It's better to keep all SPL related functions in the same spl.c.
Signed-off-by: Bin Meng
---
board/sifive/fu540/fu540.c | 33 -
board/sifive/fu540/spl.c | 33 -
2 files changed, 32 insertions(+), 34 deletions(-)
From: Bin Meng
All FU540 driver related options should be in the SoC level Kconfig.
Signed-off-by: Bin Meng
---
arch/riscv/cpu/fu540/Kconfig | 22 ++
board/sifive/fu540/Kconfig | 22 --
2 files changed, 22 insertions(+), 22 deletions(-)
diff --git
From: Bin Meng
The generic SPL version of board_init_f() should give a call to
board specific codes to initialize board in the SPL phase.
Signed-off-by: Bin Meng
---
arch/riscv/include/asm/spl.h | 7 +++
arch/riscv/lib/spl.c | 9 +
2 files changed, 16 insertions(+)
diff
Hi Vignesh,
On 03/07/20 1:04 pm, Vignesh Raghavendra wrote:
> Hi,
>
> On 02/07/20 1:32 pm, Faiz Abbas wrote:
>
> [...]
>> int am6_spl_early_init(void)
>
> Can this be static or do you intend to use this outside of this func file?
Fixed this in v2.
>
>> +{
>> +int ret;
>> +#if
Add nodes for USB0 in SPL to enable USB host boot mode
Signed-off-by: Faiz Abbas
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 27
1 file changed, 27 insertions(+)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
Because of space constraints, create a new USB defconfig for R5 to
faciliate booting from USB mass storage devices
Signed-off-by: Faiz Abbas
---
configs/am65x_evm_r5_usbmsc_defconfig | 119 ++
1 file changed, 119 insertions(+)
create mode 100644
Add USB0 nodes and set them to host mode to support USB host and
peripheral boot modes
Signed-off-by: Faiz Abbas
---
arch/arm/dts/k3-am654-r5-base-board.dts | 35 +
1 file changed, 35 insertions(+)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
Enable configs to facilitate booting from USB Mass Storage devices
as well as USB peripheral boot
Signed-off-by: Faiz Abbas
---
configs/am65x_evm_a53_defconfig | 10 ++
include/configs/am65x_evm.h | 2 ++
2 files changed, 12 insertions(+)
diff --git
Because of space constraints, create a new USB defconfig for R5 to
faciliate booting in USB peripheral (DFU) bootmode
Signed-off-by: Faiz Abbas
---
configs/am65x_evm_r5_usbdfu_defconfig | 120 ++
1 file changed, 120 insertions(+)
create mode 100644
1 - 100 of 109 matches
Mail list logo
