Re: [PATCH 2/5] doc: Move coccinelle into its own section

On 7/22/21 5:35 AM, Simon Glass wrote: This tool has nothing to do with testing. It is for refactoring code automatically using a 'semantic patch' tool. Create a new section for 'refactoring' and move it into there. It is likely that other topics may fall under the same heading, such as using

Re: [PATCH 1/5] doc: Create an intro section for testing

On 7/22/21 5:35 AM, Simon Glass wrote: At present this information is hidden away. Make it more visible by putting it first, in an intro section. Signed-off-by: Simon Glass --- doc/develop/index.rst | 2 +- doc/develop/testing.rst | 6 -- 2 files changed, 5 insertions(+), 3

[PATCH 5/5] moveconfig: Update to newer kconfiglib

Some of the more advanced features of this tool don't work anymore since kconfiglib was update. Update the code accordingly. Signed-off-by: Simon Glass --- tools/moveconfig.py | 24 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/tools/moveconfig.py

[PATCH 3/5] doc: Add docs for the moveconfig tool

Move these docs into htmldocs so they can be read there. Signed-off-by: Simon Glass --- doc/develop/index.rst | 1 + doc/develop/moveconfig.rst | 296 + tools/moveconfig.py| 291 +--- 3 files changed, 298

[PATCH 4/5] doc: Fix up outdated moveconfig docs

The examples here are a bit messed up since the command does not match the documentation. Use a different example instead. Signed-off-by: Simon Glass --- doc/develop/moveconfig.rst | 58 +++--- 1 file changed, 22 insertions(+), 36 deletions(-) diff --git

[PATCH 2/5] doc: Move coccinelle into its own section

This tool has nothing to do with testing. It is for refactoring code automatically using a 'semantic patch' tool. Create a new section for 'refactoring' and move it into there. It is likely that other topics may fall under the same heading, such as using moveconfig and search/replace tools.

[PATCH 1/5] doc: Create an intro section for testing

At present this information is hidden away. Make it more visible by putting it first, in an intro section. Signed-off-by: Simon Glass --- doc/develop/index.rst | 2 +- doc/develop/testing.rst | 6 -- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/doc/develop/index.rst

[PATCH 0/5] doc: Improve documentation for testing

This creates an introduction section for testing so that it is easier to figure out what is going on. It also moves the moveconfig docs to rST and brings in an old patch that was rejected at the time. Simon Glass (5): doc: Create an intro section for testing doc: Move coccinelle into its

[PULL] u-boot-riscv/master

Hi Tom, The following changes since commit c9204859bbdb924cda811813c545032971656480: Merge branch 'master' of git://source.denx.de/u-boot-sh (2021-07-20 19:31:40 -0400) are available in the Git repository at: g...@source.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch

Re: [PATCH 06/22] Makefile: Avoid rebuilding .dtb files each time

Hi Masahiro, On Sun, 18 Jul 2021 at 07:36, Masahiro Yamada wrote: > > On Sun, Jul 18, 2021 at 5:41 AM Simon Glass wrote: > > > > Drop the FORCE from the rule that builds .dtb files and let the normal > > dependency checking do its work. This should work correctly, at least > > for .dts files

Re: [PATCH 6/6] binman: Add basic support for debugging performance

One of binman's attributes is that it is extremely fast, at least for a Python program. Add some simple timing around operations that might take a while, such as reading an image and compressing it. This should help to maintain the performance as new features are added. This is for debugging

Re: [PATCH 1/6] binman: Put compressed data into separate files

At present compression uses the same temporary file for all invocations. With multithreading this causes the data to become corrupted. Use a different filename each time. Signed-off-by: Simon Glass --- tools/patman/tools.py | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-)

Re: [PATCH 1/1] sandbox: don't set SA_NODEFER in signal handler

Hi Heinrich, On Wed, 7 Jul 2021 at 11:37, Simon Glass wrote: > > Hi Heinrich, > > On Mon, 5 Jul 2021 at 11:43, Heinrich Schuchardt wrote: > > > > The sandbox can handle signals. Due to a damaged global data pointer > > additional exceptions in the signal handler may occur leading to an endless

Re: [PATCH 2/6] binman: Support multithreading for building images

Some images may take a while to build, e.g. if they are large and use slow compression. Support compiling sections in parallel to speed things up. Signed-off-by: Simon Glass --- tools/binman/binman.rst | 18 ++ tools/binman/cmdline.py | 4

Re: [PATCH 3/6] binman: Split node-reading out from constructor in files

The constructor should not read the node information. Move it to the ReadNode() method instead. This allows this etype to be subclassed. Signed-off-by: Simon Glass --- tools/binman/etype/files.py | 3 +++ 1 file changed, 3 insertions(+) Applied to u-boot-dm, thanks!

Re: [PATCH 4/6] binman: Use bytearray instead of string

This is faster if data is being concatenated. Update the section and collection etypes. Signed-off-by: Simon Glass --- tools/binman/etype/collection.py | 2 +- tools/binman/etype/section.py| 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) Applied to u-boot-dm, thanks!

Re: [PATCH 5/6] patman: Use bytearray instead of string

If the process outputs a lot of data on stdout this can be quite slow, since the bytestring is regenerated each time. Use a bytearray instead. Signed-off-by: Simon Glass --- tools/patman/cros_subprocess.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) Applied to u-boot-dm,

Re: [PATCH v3] dm: core: fix no null pointer detection in ofnode_get_addr_size_index()

On Mon, 12 Jul 2021 at 01:40, chenguanqiao wrote: > > From: Chen Guanqiao > > Fixed a defect of a null pointer being discovered by Coverity Scan: >CID 331544: Null pointer dereferences (REVERSE_INULL) >Null-checking "size" suggests that it may be null, but it has already been >

[PATCH v2] doc: Bring in Makefile documentation

U-Boot uses the Linux Kbuild build system. Add the associated documentation so that people can understand the Makefiles better. This is taken from Linux v5.12 Signed-off-by: Simon Glass --- Changes in v2: - Put the new entry in sorted order - Update text so that it shows up sorted in the

bug in SPI on rk3399 devices

I am not sure if it impacts non rk3399 devices or not, but on at least rk3399 devices after https://source.denx.de/u-boot/u-boot/-/commit/346df7d4fa62afc578d820b3a18815eec765074f was applied installing u-boot into SPI flash results in an unbootable system. SPL loads and runs, u-boot.itb is not

[PATCH][RFC] image: fdt: Fix DT relocation handling with multiple DRAM banks with gap

The current implementation of boot_relocate_fdt() places DT at the highest usable DRAM address, which is calculated as: env_get_bootm_low() + env_get_bootm_mapsize() which by default becomes gd->ram_base + gd->ram_size. Systems like i.MX53 can have multiple DRAM banks with gap between them,

[PATCH] rk3399: Add basic support for helios64

From: Dennis Gilmore This is a stripped down version of the vendor U-Boot patch by Aditya Prayoga found in the armbian repository. This patch is enough to have the 1G ethernet port, the micro SD card, eMMC, PCIe and UART. It sets uart2 as the default outiput device. the defconfig file has been

[PATCH 1/1] arm: Finish migration of HAS_FSL_XHCI_USB

This symbol was largely migrated, except for one case. Update it. Cc: Priyanka Jain Signed-off-by: Tom Rini --- Note that include/configs/lx2160a_common.h isn't under any MAINTAINERS entry but should be. --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 6 --

Re: [PATCH] Nokia RX-51: Update documentation about ext2/3/4

On Friday 18 June 2021 13:07:08 Tom Rini wrote: > On Fri, Jun 18, 2021 at 03:28:44PM +0200, Pali Rohár wrote: > > > Since commit 25c5b6517854 ("Nokia RX-51: Do not try calling both ext2load > > and ext4load") command ext4load is used for all ext2/3/4 fs variants. > > > > Signed-off-by: Pali

[PATCH] Nokia RX-51: Convert documentation to rst format

Signed-off-by: Pali Rohár --- board/nokia/rx51/MAINTAINERS | 2 +- doc/board/index.rst | 1 + doc/board/nokia/index.rst | 7 + .../nokia/rx51.rst} | 142 +- 4 files changed, 83

Re: [PATCH] doc: Bring in Makefile documentation

Am 21. Juli 2021 22:56:58 MESZ schrieb Simon Glass : >U-Boot uses the Linux Kbuild build system. Add the associated >documentation so that people can understand the Makefiles better. > >This is taken from Linux v5.12 > >Signed-off-by: Simon Glass >--- > > doc/develop/index.rst |1 + >

[PATCH] doc: Bring in Makefile documentation

U-Boot uses the Linux Kbuild build system. Add the associated documentation so that people can understand the Makefiles better. This is taken from Linux v5.12 Signed-off-by: Simon Glass --- doc/develop/index.rst |1 + doc/develop/makefiles.rst | 1674

[PATCH 1/2] fdt: Tidy up the code a bit with fdt addr

Clean up the code a little before changing it. Signed-off-by: Simon Glass --- cmd/fdt.c | 37 + 1 file changed, 13 insertions(+), 24 deletions(-) diff --git a/cmd/fdt.c b/cmd/fdt.c index f1e2fc2fd8b..5acc3ebaf33 100644 --- a/cmd/fdt.c +++ b/cmd/fdt.c @@

[PATCH 2/2] fdt: Show the type of devicetree with fdt addr

It seems useful to show whether the address of the Control or Working devicetree is being shown. Add support for this. Drop the confusing 0x prefix since the command itself only accepts hex. Signed-off-by: Simon Glass --- cmd/fdt.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)

Bootcount device-model I2C EEPROM partition

Hi, I'm implementing device-model backed bootcount which uses I2C EEPROM chip. I've found following device tree, which I'm replicating: https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/dts/imx53-ppd.dts

[PATCH] net: fsl-mc: fix logically dead code

The result of dpio_close() is actually taken into account. Signed-off-by: Cosmin-Florin Aluchenesei --- drivers/net/fsl-mc/mc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index 972db4cf3a..914ec001ec 100644 ---

[PATCH] drivers: net: aquantia: fix unsigned compared against 0

Change the reg variable to not be unsigned so that we not get into an unsigned compared against 0. Signed-off-by: Cosmin-Florin Aluchenesei --- drivers/net/phy/aquantia.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/aquantia.c

Re: [PATCH v2 3/3] sysreset: provide SBI based sysreset driver

On 7/21/21 12:33 PM, Heinrich Schuchardt wrote: Provide sysreset driver using the SBI system reset extension. Signed-off-by: Heinrich Schuchardt --- v2: remove a superfluous check in sbi_sysreset_request() --- MAINTAINERS | 1 + arch/riscv/cpu/cpu.c|

Re: [PATCH v2 1/3] risv: add missing SBI extension definitions

On 7/21/21 12:33 PM, Heinrich Schuchardt wrote: Add the System Reset Extension and the Hart State Management Extension definitions. Add missing RFENCE Extension enum values. The SBI 0.1 extension constants are needed for for the sbi command. Remove an #ifdef. Cf.

[PATCH v2 3/3] sysreset: provide SBI based sysreset driver

Provide sysreset driver using the SBI system reset extension. Signed-off-by: Heinrich Schuchardt --- v2: remove a superfluous check in sbi_sysreset_request() --- MAINTAINERS | 1 + arch/riscv/cpu/cpu.c| 13 - arch/riscv/include/asm/sbi.h| 1 +

[PATCH v2 0/3] riscv: enable SBI system reset

The purpose of this series is to provide the UEFI ResetSystem() service at runtime on RISC-V systems. With SBI v0.3 a system reset extension is available. This allows to implement reboot and poweroff in U-Boot in a system independent way. * Provide a system reset driver using the system reset

[PATCH v2 1/3] risv: add missing SBI extension definitions

Add the System Reset Extension and the Hart State Management Extension definitions. Add missing RFENCE Extension enum values. The SBI 0.1 extension constants are needed for for the sbi command. Remove an #ifdef. Cf. https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc

[PATCH v2 2/3] cmd/sbi: use constants instead of numerical values

Use constants for extension IDs. Signed-off-by: Heinrich Schuchardt Reviewed-by: Sean Anderson Reviewed-by: Leo Yu-Chi Liang --- v2: no change --- cmd/riscv/sbi.c | 30 +++--- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/cmd/riscv/sbi.c

Re: [PATCH RESEND u-boot-spi 0/8] Fix `mtd erase` when used with mtdpart

Hi Marek, On Thu, Jul 15, 2021 at 5:21 AM Marek Behún wrote: > > Hello, > > I accidentally forgot to send this series to U-Boot's mailing list last > time, meaning it did not end up in patchwork, so now I am resending it. > Sorry for this mess. > > The original cover letter said: > > this patch

[PATCH v5 19/20] doc: board: Move j721e document to doc/board/ti/ directory

Move j721e document from board/ti/j721e/README to doc/board/ti/j721e_evm.rst after converting it to RST format. Signed-off-by: Kishon Vijay Abraham I --- board/ti/j721e/README | 277 doc/board/index.rst| 1 + doc/board/ti/j721e_evm.rst | 316

[PATCH v5 20/20] doc: board: j721e_evm: Add documentation for firmware loading

Add documentation for loading firmwares to be used by remote cores in the system including the environment variables that has to be set to load the firmwares. Signed-off-by: Kishon Vijay Abraham I --- doc/board/ti/j721e_evm.rst | 15 +++ 1 file changed, 15 insertions(+) diff --git

[PATCH v5 16/20] configs: j7200_evm_a72_defconfig: Add config for torrent serdes and common clock framework

From: Aswath Govindraju Add config for torrent serdes and common clock framework. Signed-off-by: Aswath Govindraju Signed-off-by: Kishon Vijay Abraham I --- configs/j7200_evm_a72_defconfig | 7 +++ 1 file changed, 7 insertions(+) diff --git a/configs/j7200_evm_a72_defconfig

[PATCH v5 18/20] configs: j7200_evm_a72: Add CONFIG_PREBOOT to configure ethernet PHY

Add CONFIG_PREBOOT to provide an automatic and easier way to configure ethernet PHY before loading the firmware. Signed-off-by: Kishon Vijay Abraham I --- configs/j7200_evm_a72_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/j7200_evm_a72_defconfig

[PATCH v5 17/20] env: ti: j721e-evm: Add env variable to power on & reset QSGMII PHY in J7200 EVM

MAIN CPSW0 requires the PHY to be powered on and reset for QSGMII operation. Add a env variable to configure driving "0" on ENET_EXP_PWRDN controlled by GPIO EXPANDER2 (I2C Addr: 0x22), PIN: 17 and driving "1" on ENET_EXP_RESETZ controlled by GPIO EXPANDER2 (I2C Addr: 0x22), PIN: 18.

[PATCH v5 15/20] configs: j721e_evm_a72_defconfig: Enable the drivers required for the USB3 support

From: Jean-Jacques Hiblot Enable the mmio mux driver, the J721E-wiz PHy driver and the cadence sierra phy driver. All of them are required for USB3 support Signed-off-by: Jean-Jacques Hiblot Signed-off-by: Vignesh Raghavendra Signed-off-by: Kishon Vijay Abraham I ---

[PATCH v5 08/20] phy: cadence: Add driver for Torrent SERDES

From: Aswath Govindraju Add driver for Torrent SERDES. Signed-off-by: Aswath Govindraju Signed-off-by: Kishon Vijay Abraham I --- drivers/phy/cadence/Kconfig |6 + drivers/phy/cadence/Makefile |1 + drivers/phy/cadence/phy-cadence-torrent.c | 2463

[PATCH v5 14/20] arm: dts: k3-j7200-common-proc-board-u-boot: Add u-boot tags for torrent serdes

From: Aswath Govindraju Add u-boot tags for torrent serdes. This has properties specific to u-boot on top of DT in v5.13 Linux Kernel. Signed-off-by: Aswath Govindraju Signed-off-by: Kishon Vijay Abraham I --- arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi | 12 1 file

[PATCH v5 13/20] arm: dts: k3-j7200-common-proc-board: Enable SERDES DT

From: Aswath Govindraju Add default lane function for torrent serdes. This is in sync with v5.13 Linux Kernel. Signed-off-by: Aswath Govindraju Signed-off-by: Kishon Vijay Abraham I --- arch/arm/dts/k3-j7200-common-proc-board.dts | 23 + 1 file changed, 23 insertions(+)

[PATCH v5 12/20] arm: dts: k3-j7200-main: Add DT node for torrent serdes

From: Aswath Govindraju Add DT node for torrent serdes. This is in sync with v5.13 Linux Kernel. Signed-off-by: Aswath Govindraju Signed-off-by: Kishon Vijay Abraham I --- arch/arm/dts/k3-j7200-main.dtsi | 63 + 1 file changed, 63 insertions(+) diff --git

[PATCH v5 11/20] ARM: dts: k3-j721e: Add support for USB3 in USB0 instance

Configure the parent clock of wiz3_pll0_refclk to the internal clock required for USB3 to be functional and also remove "ti,usb2-only" property as it now supports USB3 mode. This has properties specific to u-boot on top of DT present in v5.13 of Linux Kernel. Signed-off-by: Jean-Jacques Hiblot

[PATCH v5 09/20] phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC

From: Jean-Jacques Hiblot Add support for WIZ module present in TI's J721E SoC. WIZ is a SERDES wrapper used to configure some of the input signals to the SERDES. It is used with both Sierra(16G) and Torrent(10G) SERDES. This driver configures three clock selects (pll0, pll1, dig) and supports

[PATCH v5 10/20] board: ti: j721e: Add support for probing and configuring Torrent serdes on J7200

From: Aswath Govindraju Add support for probing and configuring Torrent serdes on J7200. Signed-off-by: Aswath Govindraju Signed-off-by: Kishon Vijay Abraham I --- board/ti/j721e/evm.c | 34 +- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git

[PATCH v5 07/20] phy: cadence: Add driver for Sierra PHY

From: Alan Douglas Add a Sierra PHY driver with PCIe and USB support. This driver is a port from the mainline linux driver. The PHY has multiple lanes, which can be configured into groups, and a generic PHY device is created for each group. There are two resets controlling the overall PHY

[PATCH v5 06/20] dt-bindings: ti-serdes-mux: Add defines for AM64 SoC

AM64 has a single lane SERDES which can be configured to be used with either PCIe or USB. Define the possilbe values for the SERDES function in AM64 SoC here. Signed-off-by: Kishon Vijay Abraham I --- include/dt-bindings/mux/ti-serdes.h | 5 + 1 file changed, 5 insertions(+) diff --git

[PATCH v5 04/20] dt-bindings: phy: Add defines for AM64 SERDES Wrapper

Add defines for AM64 SERDES Wrapper. Signed-off-by: Kishon Vijay Abraham I --- include/dt-bindings/phy/phy-ti.h | 21 + 1 file changed, 21 insertions(+) create mode 100644 include/dt-bindings/phy/phy-ti.h diff --git a/include/dt-bindings/phy/phy-ti.h

[PATCH v5 05/20] dt-bindings: phy: cadence-torrent: Add defines for refclk driver

Add defines for refclk driver used to route the refclk out of torrent SERDES. Signed-off-by: Kishon Vijay Abraham I --- include/dt-bindings/phy/phy-cadence.h | 20 1 file changed, 20 insertions(+) create mode 100644 include/dt-bindings/phy/phy-cadence.h diff --git

[PATCH v5 03/20] dt-bindings: phy: Add definitions for additional phy types

From: Aswath Govindraju Add definitions for additional phy types that's used specifically for Torrent SERDES. Signed-off-by: Aswath Govindraju Signed-off-by: Kishon Vijay Abraham I --- include/dt-bindings/phy/phy.h | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH v5 01/20] dm: core: Add helper to compare node names

Add helper to compare node names. Signed-off-by: Kishon Vijay Abraham I --- drivers/core/ofnode.c | 13 + include/dm/ofnode.h | 10 ++ 2 files changed, 23 insertions(+) diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index eeeccfb446..e83d3141b2 100644 ---

[PATCH v5 02/20] dm: test: Add test case to check node name ignoring unit address

Add test to check node name ignoring unit address. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Simon Glass --- test/dm/core.c | 14 ++ 1 file changed, 14 insertions(+) diff --git a/test/dm/core.c b/test/dm/core.c index 2210345dd1..e83f71f767 100644 --- a/test/dm/core.c +++

[PATCH v5 00/20] TI/Cadence: Add Sierra/Torrent SERDES driver

Patch series adds Sierra and Torrent SERDES driver for the SERDES used in TI's K3 platforms. This SERDES is used by USB3, PCIe and Ethernet. This series is mostly an adaptation of drivers added in upstream Linux kernel. Changes from v4: 1) Dropped `[PATCH v4 01/21] drivers: reset: Add

Re: [PATCH RESEND u-boot-spi 2/8] mtd: spi-nor-core: Check return value of write_enable() in spi_nor_erase()

On Thu, Jul 15, 2021 at 5:21 AM Marek Behún wrote: > > The spi_nor_erase() function does not check return value of the > write_enable() call. Fix this. > > Signed-off-by: Marek Behún > Tested-by: Masami Hiramatsu > --- Reviewed-by: Jagan Teki

Re: [PATCH RESEND u-boot-spi 1/8] mtd: spi-nor-core: Try cleaning up in case writing BAR failed

On Thu, Jul 15, 2021 at 5:21 AM Marek Behún wrote: > > Use the cleanup codepath of spi_nor_erase() also in the event of failure > of writing the BAR register. > > Signed-off-by: Marek Behún > Tested-by: Masami Hiramatsu > --- Reviewed-by: Jagan Teki

Re: [PATCH 00/15] lib: Add support for a decimal 0m prefix for numbers

Hi Wolfgang, On Wed, 21 Jul 2021 at 01:53, Wolfgang Denk wrote: > > Hi, > > In message <20210720160547.GM9379@bill-the-cat> you wrote: > > > > > So for example (10)123 would mean decimal 123? I don't know how we > > > would parse brackets separately from expressions though. > > > > (123)10 would

Re: [PATCH 2/2] board: sifive: unmatched: reset USB hub, PCIe-USB bridge, and ULPI device in SPL

On Thu, Jul 08, 2021 at 09:08:21AM +0800, Vincent Chen wrote: > Ensure USB hub, PCIe-USB bridge, and ULPI device to be reset > even if the rebooting is without power-cycling. > > Signed-off-by: Vincent Chen > --- > board/sifive/unmatched/spl.c | 36 > 1 file

Re: [PATCH 1/2] board: sifive: unmatched: refine GEMGXL initialized function in SPL

On Thu, Jul 08, 2021 at 09:08:20AM +0800, Vincent Chen wrote: > Create a new function spl_reset_device_by_gpio to reset the device > whose reset pin is connected to the GPIO. Then, using this function > to initialize GEMGXL. > > Signed-off-by: Vincent Chen > --- > board/sifive/unmatched/spl.c |

Re: [PATCH 13/15] RFC: lib: Support a binary prefix 0y

Hi Wolfgang, On Wed, 21 Jul 2021 at 02:27, Wolfgang Denk wrote: > > Dear Simon, > > In message <20210720132940.1171011-14-...@chromium.org> you wrote: > > In some cases it is useful to be able to supply a binary value to a > > command. Use the '0y' prefix for this (binarY). > > We also don't

Re: [PATCH] patman: add warning for invalid tag

Hi Patrick, On Wed, 21 Jul 2021 at 03:45, Patrick Delaunay wrote: > > Add a error in patman tool when the commit message contents an invalid > tag "Serie-.*" instead of "Series-.*". > > Signed-off-by: Patrick Delaunay > --- > I create this patch to avoid my frequent mistake: > using "Serie-"

Re: [PATCH] arm: vexpress64: juno: Enable distro_bootcmd functionality

On Mon, Jul 12, 2021 at 1:25 AM Andre Przywara wrote: > The ARM Juno boards can be used as somewhat decent machines to run > off-the-shelf distributions, with USB, SATA, GBit Ethernet and 8GB of > DRAM. > > With stable DTs in the board's NOR flash this would work really nicely, > however the

Re: [PATCH 00/15] lib: Add support for a decimal 0m prefix for numbers

Hi Tom, On Tue, 20 Jul 2021 at 13:28, Tom Rini wrote: > > On Tue, Jul 20, 2021 at 12:33:14PM -0600, Simon Glass wrote: > > Hi Tom. > > > > On Tue, 20 Jul 2021 at 10:05, Tom Rini wrote: > > > > > > On Tue, Jul 20, 2021 at 09:57:55AM -0600, Simon Glass wrote: > > > > Hi Tom, > > > > > > > > On

[PATCH V4 43/44] arm: dts: add i.MX8ULP dtsi

From: Peng Fan Add i.MX8ULP dtsi Signed-off-by: Peng Fan --- arch/arm/dts/imx8ulp-pinfunc.h| 978 ++ arch/arm/dts/imx8ulp.dtsi | 728 include/dt-bindings/clock/imx8ulp-clock.h | 247 ++ 3 files changed, 1953 insertions(+)

[PATCH V4 34/44] arm: imx8ulp: add dummy imx_get_mac_from_fuse

From: Peng Fan Add imx_get_mac_from_fuse for enet build pass Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8ulp/soc.c | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index e5985c4cf1..0728cb9847 100644 ---

[PATCH V4 36/44] driver: misc: imx8ulp: Add fuse driver for imx8ulp

From: Ye Li This driver uses FSB to read some fuses, but not support program fuse. It only works in SPL (secure mode), u-boot needs traps to ATF to read them. Some fuses can read from S400 API and others are from FSB. Also support program some fuses via S400 API Signed-off-by: Ye Li ---

[PATCH V4 44/44] arm: imx: add i.MX8ULP EVK support

From: Peng Fan Add i.MX8ULP EVK basic support, support SD/I2C/ENET/LPUART Log as below: I would keep some debug info for now, and after we move to be stable and production launch, we could drop that. U-Boot SPL 2021.07-rc4-00164-gb800e19a6b (Jun 29 2021 - 10:23:30 +0800) Normal Boot

[PATCH V4 41/44] imx8ulp: add upower api support

From: Peng Fan Add upower api support, this is modified from upower firmware exported package. Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8ulp/upower.h| 15 + arch/arm/mach-imx/imx8ulp/Makefile| 4 + arch/arm/mach-imx/imx8ulp/upower/Makefile | 6 +

[PATCH V4 42/44] ddr: Add DDR driver for iMX8ULP

From: Ye Li Add iMX8ULP DDR initialization driver which loads the DDR timing parameters and executes the training procedure. When enabling IMX8ULP_DRAM_PHY_PLL_BYPASS, using PHY PLL bypass mode to do DDR init Signed-off-by: Ye Li --- drivers/Makefile | 1 +

[PATCH V4 40/44] imx8ulp: move struct mu_type to common header

From: Peng Fan Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8ulp/imx-regs.h | 25 drivers/misc/imx8ulp/imx8ulp_mu.c| 19 +-- 2 files changed, 26 insertions(+),

[PATCH V4 38/44] imx8ulp: Use DGO_GP5 to get boot config

From: Ye Li Since CMC1 MR0 only reflects high 16 bits boot cfg used for AP domian, it does not connect to low 16 bits for RTD. So we can't get the correct boot mode. Change to use DGO_GP5 of SEC_SIM which is set by ROM. Signed-off-by: Ye Li --- arch/arm/mach-imx/imx8ulp/soc.c | 2 +- 1 file

[PATCH V4 39/44] imx8ulp: Add workaround for eMMC boot

From: Ye Li When booting from boot part1/2, the image offset should be 0, but ROM has a bug to return 0x8000. Has to workaround the issue before ROM fix it. Use a ROM function to know boot from emmc boot part or user part So we can set the image offset accordingly. Signed-off-by: Ye Li ---

[PATCH V4 33/44] arm: imx8ulp: Allocate DCNANO and MIPI_DSI to AD domain

From: Ye Li Configure DCNANO and MIPI_DSI to be controlled by AD for single boot Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8ulp/soc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index

[PATCH V4 35/44] arm: imx8ulp: add iomuxc support

From: Peng Fan Add i.MX8ULP iomuxc support Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8ulp/iomux.h | 82 +++ arch/arm/mach-imx/imx8ulp/iomux.c | 56 +++- 2 files changed, 137 insertions(+), 1 deletion(-) create mode 100644

[PATCH V4 37/44] imx8ulp: soc: correct reset cause

From: Peng Fan The CMC1 SRS reflects the current reset cause, not SSRS. Then you could get "Reset cause: WARM-WDG" when issue reset in U-Boot. Reviewed-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8ulp/soc.c | 10 +++--- 1 file changed, 3 insertions(+), 7 deletions(-)

[PATCH V4 32/44] arm: iMX8ULP: Add boot device relevant functions

From: Ye Li Read from ROM API to get current boot device. Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 1 + arch/arm/mach-imx/imx8ulp/soc.c | 84 +++ 2 files changed, 85 insertions(+) diff --git

[PATCH V4 30/44] imx8ulp: unify rdc functions

From: Peng Fan Unify rdc function to rdc.c Update soc.c to use new rdc function Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8ulp/rdc.h | 27 +++ arch/arm/mach-imx/imx8ulp/rdc.c | 283 +++- arch/arm/mach-imx/imx8ulp/soc.c | 180 ++-

[PATCH V4 31/44] arm: imx8ulp: Probe the S400 MU device in arch init

From: Ye Li Need probe the S400 MU device in arch_cpu_init_dm, so we can use S400 API in u-boot Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8ulp/soc.c | 35 - 1 file changed, 34 insertions(+), 1 deletion(-) diff --git

[PATCH V4 29/44] arm: imx8ulp: release trdc and assign lpav from RTD to APD

From: Peng Fan Rlease LPAV from RTD to APD Release gpu2D/3D to APD Set TRDC MBC2 MEM1 for iomuxc0 access Since upower depends AP/M33 SW to configure IOMUX for its PMIC i2c and MODE pins. we have to open iomuxc0 access for A35 core (domain 7) in single boot. Signed-off-by: Peng Fan

[PATCH V4 28/44] arm: imx8ulp: add trdc release request

From: Peng Fan Add TRDC release request, then we could configure resources to be accessible by A35 Domain. Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8ulp/soc.c | 26 +- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git

[PATCH V4 27/44] arm: imx8ulp: add rdc support

From: Peng Fan There is xrdc inside i.MX8ULP, we need to configure permission to make sure AP non-secure world could access the resources. Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8ulp/sys_proto.h | 2 + arch/arm/mach-imx/imx8ulp/Makefile| 2 +-

[PATCH V4 25/44] drivers: misc: s400_api: Update API for fuse read and write

From: Ye Li Add API to support fuse read and write Signed-off-by: Ye Li --- arch/arm/include/asm/arch-imx8ulp/s400_api.h | 7 +- drivers/misc/imx8ulp/s400_api.c | 81 2 files changed, 87 insertions(+), 1 deletion(-) diff --git

[PATCH V4 26/44] arm: imx8ulp: release and configure XRDC at early phase

From: Ye Li Since S400 will set the memory of SPL image to R/X. We can't write to any data in SPL image. 1. Set the parameters save/restore only for u-boot, not for SPL. to avoid write data. 2. Not use MU DM driver but directly call MU API to send release XRDC to S400 at early phase. 3.

[PATCH V4 24/44] drivers: misc: imx8ulp: Update S400 API for release RDC

From: Ye Li The RDC API is updated to add a field for XRDC or TRDC Signed-off-by: Ye Li --- arch/arm/include/asm/arch-imx8ulp/s400_api.h | 2 +- drivers/misc/imx8ulp/s400_api.c | 7 +-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git

[PATCH V4 23/44] drivers: misc: imx8ulp: Add S400 API for image authentication

From: Ye Li Add S400 API for image authentication Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8ulp/s400_api.h | 8 +- drivers/misc/imx8ulp/s400_api.c | 121 ++- 2 files changed, 127 insertions(+), 2 deletions(-) diff --git

[PATCH V4 21/44] arm: imx8ulp: Update the reset vector in u-boot

From: Ye Li Because we have set reset vector to ATF in SPL, have to set it back to ROM for any reset in u-boot Signed-off-by: Ye Li Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8ulp/soc.c | 35 + 1 file changed, 22 insertions(+), 13 deletions(-) diff

[PATCH V4 22/44] drivers: misc: s400_api: Update S400_SUCCESS_IND to 0xd6

From: Ye Li According to latest S400 API doc, the the success indicate value is changed to 0xd6. So update the driver codes. Signed-off-by: Ye Li Signed-off-by: Peng Fan --- drivers/misc/imx8ulp/imx8ulp_mu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH V4 20/44] arm: imx8ulp: disable wdog3

From: Peng Fan Disable wdog3 which is configured by ROM Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8ulp/soc.c | 36 - 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index

[PATCH V4 19/44] arm: imx8ulp: Enable full L2 cache in SPL

From: Ye Li SRAM2 is half L2 cache and default to SRAM after system boot. To enable the full l2 cache (512KB), it needs to reset A35 to make the change happen. So re-implement the jump entry function in SPL: 1. configure the core0 reset vector to entry (ATF) 2. enable the L2 full cache 3. reset

[PATCH V4 16/44] arm: imx8ulp: add clock support

From: Peng Fan Add i.MX8ULP clock support Signed-off-by: Peng Fan --- arch/arm/include/asm/arch-imx8ulp/cgc.h | 130 ++ arch/arm/include/asm/arch-imx8ulp/clock.h| 9 +- arch/arm/include/asm/arch-imx8ulp/imx-regs.h | 1 + arch/arm/include/asm/arch-imx8ulp/pcc.h | 139

[PATCH V4 17/44] drivers: mmc: fsl_esdhc_imx: support i.MX8ULP

From: Peng Fan i.MX8ULP reuse same SDHC IP as i.MX8M, so follow i.MX8M code logic. Signed-off-by: Peng Fan --- drivers/mmc/Kconfig | 2 +- drivers/mmc/fsl_esdhc_imx.c | 12 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/Kconfig

[PATCH V4 18/44] arm: imx8ulp: soc: Change to use CMC1 to get bootcfg

From: Ye Li CMC1 also has a MR register for bootcfg Signed-off-by: Ye Li --- arch/arm/mach-imx/imx8ulp/soc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index 6f4b506386..cddcdc2d20 100644 ---

[PATCH V4 14/44] pinctrl: Add pinctrl driver for imx8ulp

From: Ye Li Add pinctrl driver for i.MX8ULP Signed-off-by: Ye Li Signed-off-by: Peng Fan --- drivers/pinctrl/nxp/Kconfig | 14 + drivers/pinctrl/nxp/Makefile | 1 + drivers/pinctrl/nxp/pinctrl-imx8ulp.c | 44 +++ 3 files changed, 59

[PATCH V4 15/44] driver: serial: fsl_lpuart: support i.MX8ULP

From: Peng Fan i.MX8ULP lpuart has same register layout as i.MX7ULP and i.MX8 Signed-off-by: Peng Fan --- include/fsl_lpuart.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/fsl_lpuart.h b/include/fsl_lpuart.h index 511fb84367..18e5cc15d6 100644 ---

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