Hi Julien,
On 5/7/2024 10:35 PM, Julien Grall wrote:
Hi,
On 06/05/2024 06:17, Henry Wang wrote:
On 5/1/2024 9:58 PM, Anthony PERARD wrote:
On Wed, Apr 24, 2024 at 11:34:39AM +0800, Henry Wang wrote:
Increase number of spi to 160 i.e. gic_number_lines() for Xilinx
ZynqMP - 32.
This was done
Hi,
On 06/05/2024 06:17, Henry Wang wrote:
On 5/1/2024 9:58 PM, Anthony PERARD wrote:
On Wed, Apr 24, 2024 at 11:34:39AM +0800, Henry Wang wrote:
Increase number of spi to 160 i.e. gic_number_lines() for Xilinx
ZynqMP - 32.
This was done to allocate and assign IRQs to a running domain.
Hi Anthony,
(+Arm maintainers)
On 5/1/2024 9:58 PM, Anthony PERARD wrote:
On Wed, Apr 24, 2024 at 11:34:39AM +0800, Henry Wang wrote:
Increase number of spi to 160 i.e. gic_number_lines() for Xilinx ZynqMP - 32.
This was done to allocate and assign IRQs to a running domain.
Signed-off-by:
On Wed, Apr 24, 2024 at 11:34:39AM +0800, Henry Wang wrote:
> Increase number of spi to 160 i.e. gic_number_lines() for Xilinx ZynqMP - 32.
> This was done to allocate and assign IRQs to a running domain.
>
> Signed-off-by: Vikram Garhwal
> Signed-off-by: Stefano Stabellini
> Signed-off-by:
From: Vikram Garhwal
Increase number of spi to 160 i.e. gic_number_lines() for Xilinx ZynqMP - 32.
This was done to allocate and assign IRQs to a running domain.
Signed-off-by: Vikram Garhwal
Signed-off-by: Stefano Stabellini
Signed-off-by: Henry Wang
---
tools/libs/light/libxl_arm.c | 3
