There's no other way to shutdown a PVH guest at the moment.
Signed-off-by: Roger Pau Monné
---
Cc: Ian Jackson
Cc: Wei Liu
---
tools/libxl/libxl_domain.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/pv/dom0_build.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/xen/arch/x86/pv/dom0_build.c
When the FreeBSD installer is booted on the godello{0/1} boxes it
receives spurious key strokes. This doesn't happen so far when booted
from disk, or with any other boxes.
In order to cope with this remove the loader timeout on the install
image. Note that failure to boot will still drop the
Pau Monne (19):
osstest: make built_stash_file store a path_ runvar for each file
osstest: move known_hosts generation to TestSupport
osstest: add executive prefix to resource_shared_mark_ready
osstest: introduce host_shared_mark_ready
osstest: introduce build helpers for FreeBSD
osstest
New versions of iasl have introduced improved C file generation, as
reported in the changelog:
iASL: Enhanced the -tc option (which creates an AML hex file in C,
suitable for import into a firmware project):
1) Create a unique name for the table, to simplify use of multiple
SSDTs.
2) Add a
Use a global variable to store the start flags for both PV and PVH.
This allows the xen_initial_domain macro to work properly on PVH.
Note that ARM is also switched to use the new variable.
Signed-off-by: Boris Ostrovsky
Signed-off-by: Roger Pau Monné
On PVH MTRR is not initialized by the firmware (because there's no
firmware), so the kernel is started with MTRR disabled which means all
memory accesses are UC.
So far there have been no issues (ie: slowdowns) caused by this
because PVH only supported DomU mode without passed-through devices,
so
Class 0 devices are legacy pre PCI 2.0 devices that didn't have a
class code. Treat them as endpoints, so that they can be handled by
the IOMMU and properly passed-through to the hardware domain.
Such device has been seen on a Super Micro server, lspci -vv reports:
00:13.0 Non-VGA unclassified
this incorrect behavior introduce a new update helper
that should be used to update the bindings of an already enabled group
of MSI interrupts.
Thanks, Roger.
Roger Pau Monne (2):
vpci/msi: split code to bind pirq
vpci/msi: fix update of bound MSI interrupts
xen/arch/x86/hvm/vmsi.c | 96
Current update process of already bound MSI interrupts is wrong
because unmap_domain_pirq calls pci_disable_msi, which disables MSI
interrupts on the device. On the other hand map_domain_pirq doesn't
enable MSI, so the current update process of already enabled MSI
entries is wrong because MSI
And put it in a separate update function. This is required in order to
improve binding of MSI PIRQs when using vPCI.
No functional change.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
This prevents page-shattering, by being able to populate the RAM
regions below 4GB using 1GB pages, provided the guest memory size is
set to a multiple of a GB.
Note that there are some special and ACPI pages in the MMIO hole that
will be populated using smaller order pages, but those shouldn't
The value written by the guest must be valid according to the mask
provided in the interrupt routing capabilities register. If the
interrupt is not valid set it to the first valid IRQ in the
capabilities field if the timer is enabled, else just clear the field.
Also refuse to start any timer that
And enable MTRR. This allows to provide a sane initial MTRR state for
PVH DomUs. This will have to be expanded when pci-passthrough support
is added to PVH guests, so that MMIO regions of devices are set as
UC.
Note that initial MTRR setup is done by hvmloader for HVM guests,
that's not used by
Expand the size of the variable ranges array to match the size of the
underlying hardware, this is a preparatory change for copying the
hardware MTRR state for Dom0.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
Copy the state found on the hardware when creating a PVH Dom0. Since
the memory map provided to a PVH Dom0 is based on the native one using
the same set of MTRR ranges should provide Dom0 with a sane MTRR state
without having to manually build it in Xen.
Signed-off-by: Roger Pau Monné
, Roger.
Roger Pau Monne (5):
hvm/mtrr: add emacs local variables block with formatting info
hvm/mtrr: use the hardware number of variable ranges for Dom0
hvm/mtrr: copy hardware state for Dom0
libxc/pvh: set default MTRR type to write-back
docs/pvh: document initial MTRR state
docs/misc
Provided to both Dom0 and DomUs.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan Beulich
Cc: Julien Grall
Expand the size of the variable ranges array to match the size of the
underlying hardware, this is a preparatory change for copying the
hardware MTRR state for Dom0.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
And enable MTRR. This allows to provide a sane initial MTRR state for
PVH DomUs. This will have to be expanded when pci-passthrough support
is added to PVH guests, so that MMIO regions of devices are set as
UC.
Note that initial MTRR setup is done by hvmloader for HVM guests,
that's not used by
Provided to both Dom0 and DomUs.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan Beulich
Cc: Julien Grall
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/hvm/mtrr.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/xen/arch/x86/hvm/mtrr.c b/xen/arch/x86/hvm/mtrr.c
index
, Roger.
Roger Pau Monne (6):
hvm/mtrr: add emacs local variables block with formatting info
mtrr: introduce mask to get VCNT from MTRRcap MSR
hvm/mtrr: use the hardware number of variable ranges for Dom0
hvm/mtrr: copy hardware state for Dom0
libxc/pvh: set default MTRR type to write-back
No functional change.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/cpu/mtrr/main.c| 2 +-
xen/arch/x86/hvm/mtrr.c | 6 +++---
xen/include/asm-x86/msr-index.h | 2 ++
3
Copy the state found on the hardware when creating a PVH Dom0. Since
the memory map provided to a PVH Dom0 is based on the native one using
the same set of MTRR ranges should provide Dom0 with a sane MTRR state
without having to manually build it in Xen.
Signed-off-by: Roger Pau Monné
Current update process of already bound MSI interrupts is wrong
because unmap_domain_pirq calls pci_disable_msi, which disables MSI
interrupts on the device. On the other hand map_domain_pirq doesn't
enable MSI, so the current update process of already enabled MSI
entries is wrong because MSI
The current unbind loop on failure in vpci_msi_enable is wrong and
will only work correctly if the initial pirq is 0. Fix this by adding
a proper bound.
Reported-by: Jan Beulich
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc:
And put it in a separate update function. This is required in order to
improve binding of MSI PIRQs when using vPCI.
No functional change.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
The function is supposed to return whether the MTRR and PAT state of
two CPUs match. Currently this is not properly done because the test
for the deftype and the enable bits required both the deftype and the
enable bits to be different, while just one of those fields being
different can already
Copy the state found on the hardware when creating a PVH Dom0. Since
the memory map provided to a PVH Dom0 is based on the native one using
the same set of MTRR ranges should provide Dom0 with a sane MTRR state
without having to manually build it in Xen.
Signed-off-by: Roger Pau Monné
been rebased on top of a couple of fixes/improvements from Jan,
which are also included in the series.
Thanks, Roger.
Jan Beulich (2):
x86/HVM: improve MTRR load checks
x86/mtrr: split "enabled" field into two boolean flags
Roger Pau Monne (6):
mtrr: introduce mask to get VCNT from M
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/hvm/mtrr.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/xen/arch/x86/hvm/mtrr.c b/xen/arch/x86/hvm/mtrr.c
index
Provided to both Dom0 and DomUs.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan Beulich
Cc: Julien Grall
And enable MTRR. This allows to provide a sane initial MTRR state for
PVH DomUs. This will have to be expanded when pci-passthrough support
is added to PVH guests, so that MMIO regions of devices are set as
UC.
Note that initial MTRR setup is done by hvmloader for HVM guests,
that's not used by
From: Jan Beulich
The code hopefully is more readable this way.
Also switch have_fixed to bool, seeing that it already is used as a
boolean.
Signed-off-by: Jan Beulich
[switched to use MASK_*]
Signed-off-by: Roger Pau Monné
---
Cc:
From: Jan Beulich
We should not assume that the incoming set of values contains exactly
MTRR_VCNT variable range MSRs. Permit a smaller amount and reject a
bigger one. As a result the save path then also needs to no longer use
a fixed upper bound, in turn requiring unused
No functional change.
Signed-off-by: Roger Pau Monné
Reviewed-by: Jan Beulich
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
Changes since v3:
- Rebase on top of Jan's MTRR fixes.
Changes since v2:
- Use
The value written by the guest must be valid according to the mask
provided in the interrupt routing capabilities register. If the
interrupt is not valid set it to the first valid IRQ in the
capabilities field if the timer is enabled, else just clear the field.
Also refuse to start any timer that
Instead of the stale value inside the periodic_time struct.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/hvm/vpt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/hvm/vpt.c b/xen/arch/x86/hvm/vpt.c
index
Level trigger interrupts will be asserted regardless of whether the
interrupt is masked, and thus the callback will also be executed.
Add a new 'level' parameter to create_periodic_time in order to create
level triggered timers.
Note that none of the current users of vpt are switched to use
No functional change.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/hvm/vpt.c | 67 +++---
1 file changed, 36 insertions(+), 31 deletions(-)
diff --git a/xen/arch/x86/hvm/vpt.c b/xen/arch/x86/hvm/vpt.c
index
In order to test HPET level trigger interrupts.
Note that the test doesn't check that the interrupt is injected
correctly, only that the status bits are properly set an acknowledged
when using HPET with level triggered interrupts.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
---
implementation in Xen.
Last patch adds some basic testing of hpet (mainly the level triggered
interrupts) to xtf.
Thanks, Roger.
Roger Pau Monne (6):
vpt: fix create_periodic_time to use the irq parameter
vhpet: check that the set interrupt route is valid
vpt: convert periodic_time fields to bool
vpt
No functional change.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/include/asm-x86/hvm/vpt.h | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/xen/include/asm-x86/hvm/vpt.h b/xen/include/asm-x86/hvm/vpt.h
index
Level triggered interrupts are not an optional feature of HPET, and
must be implemented in order to comply with the HPET specification.
Implement them by adding a callback to the timer which sets the
interrupt bit in the general interrupt status register. Further
interrupts (in case of periodic
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/hvm/mtrr.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/xen/arch/x86/hvm/mtrr.c b/xen/arch/x86/hvm/mtrr.c
index c181a7a3d0..2f8f8ddd8f 100644
--- a/xen/arch/x86/hvm/mtrr.c
+++
From: Jan Beulich
The code hopefully is more readable this way.
Also switch have_fixed to bool, seeing that it already is used as a
boolean.
Signed-off-by: Jan Beulich
[switched to use MASK_*]
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
From: Jan Beulich
We should not assume that the incoming set of values contains exactly
MTRR_VCNT variable range MSRs. Permit a smaller amount and reject a
bigger one. As a result the save path then also needs to no longer use
a fixed upper bound, in turn requiring unused space in the save
Expand the size of the variable ranges array to match the size of the
underlying hardware, this is a preparatory change for copying the
hardware MTRR state for Dom0.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
Changes since v3:
- Move the index check to
Copy the state found on the hardware when creating a PVH Dom0. Since
the memory map provided to a PVH Dom0 is based on the native one using
the same set of MTRR ranges should provide Dom0 with a sane MTRR state
without having to manually build it in Xen.
Signed-off-by: Roger Pau Monné
Provided to both Dom0 and DomUs.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan Beulich
Cc: Julien Grall
Cc: Konrad Rzeszutek Wilk
Cc: Stefano Stabellini
Cc: Tim Deegan
Cc: Wei Liu
---
Changes since v2:
- Add 'currently' to the first
Use a global variable to store the start flags for both PV and PVH.
This allows the xen_initial_domain macro to work properly on PVH.
Note that ARM is also switched to use the new variable.
Signed-off-by: Boris Ostrovsky
Signed-off-by: Roger Pau Monné
---
Cc: Boris Ostrovsky
Cc: Juergen Gross
And enable MTRR. This allows to provide a sane initial MTRR state for
PVH DomUs. This will have to be expanded when pci-passthrough support
is added to PVH guests, so that MMIO regions of devices are set as
UC.
Note that initial MTRR setup is done by hvmloader for HVM guests,
that's not used by
Add a note to spell out that if the address tag is not present the
file should be loaded using the elf header.
Signed-off-by: Roger Pau Monné
---
Cc: Daniel Kiper
Cc: xen-devel@lists.xenproject.org
---
Changes since v1:
- s/elf/@sc{elf}/
- s/Multiboot/Multiboot2/
---
doc/multiboot.texi | 6
Add a note to spell out that if the address tag is not present the
file should be loaded using the elf header.
Signed-off-by: Roger Pau Monné
---
Cc: Daniel Kiper
Cc: xen-devel@lists.xenproject.org
---
Changes since v2:
- Clarify that the address tag must be used if present.
Changes since v1:
Add a note to spell out that if the address tag is not present the
file should be loaded using the elf header.
Signed-off-by: Roger Pau Monné
---
Cc: Daniel Kiper
Cc: xen-devel@lists.xenproject.org
---
doc/multiboot.texi | 6 ++
1 file changed, 6 insertions(+)
diff --git
clang is not capable of building the x86 emulator test harness, so
disconnect it from the clang build until it can be fixed.
Signed-off-by: Roger Pau Monné
---
Cc: Ian Jackson
Cc: Wei Liu
---
tools/tests/Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/tests/Makefile
SeaBIOS requires gcc and GNU ld in order to build, so allow setting
SEABIOSCC and SEABIOSLD by the caller when building in order to pass
the path to the compiler and linker that should be used when building
SeaBIOS.
Note that the LD32BIT-y variable was used by FreeBSD builds and is no
longer
ENODATA is not part of the standard set of errno values, so use
ENOENT instead. This fixes the build on FreeBSD.
Signed-off-by: Roger Pau Monné
---
Cc: Ian Jackson
Cc: Wei Liu
---
tools/tests/xenstore/xs-test.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git
The default make on FreeBSD is the BSD make, and Xen requires the GNU
make in order to build. Set the make command based on the OS for the
Xen build.
Signed-off-by: Roger Pau Monné
---
ts-xen-build | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/ts-xen-build
Hello,
This series contains some minor FreeBSD build fixes and improvements
required in order to add a Xen build on FreeBSD to osstest.
Thanks, Roger.
Roger Pau Monne (4):
firmware/seabios: fix build on systems with non GNU toolchains
tests: disable x86 emulator test harness when using
://lists.xenproject.org/archives/html/xen-devel/2018-07/msg00048.html
Thanks, Roger.
Roger Pau Monne (3):
osstest: remove duplicate set_freebsd_runvars
osstest: set the make command to use for xen-build
osstest: add FreeBSD Xen build job
make-freebsd-flight | 48
To both the FreeBSD and the xen-unstable flights.
This is the runvar difference of a xen-unstable flight:
+build-amd64-freebsd all_host_os freebsd
+build-amd64-xsm-freebsd all_host_os freebsd
+build-amd64-freebsd arch amd64
+build-amd64-xsm-freebsd arch
None of the called functions return any errors, so there's no point in
returning an int from xc_cpuid_policy.
Signed-off-by: Roger Pau Monné
---
tools/libxc/xc_cpuid_x86.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/tools/libxc/xc_cpuid_x86.c
PVHv2 uses the HVM path, not the PV one.
Signed-off-by: Roger Pau Monné
---
tools/libxc/xc_cpuid_x86.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index 21537f06f1..364f802c0f 100644
---
The makefile rule to generate the cpuid-autogen.h header passes the
whole list of dependencies to gen-cpuid.py but only the first
dependency is actually needed.
So far this seems to be harmless.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan
Hello,
This series contain some minor fixes for cpuid header file generation
and a couple of fixes for libxc related cpuid functions.
Thanks, Roger.
Roger Pau Monne (3):
x86/cpuid: fix generation of auto cpuid header
libxc: fix stale PVH comment
libxc: do not return a value from
When running as PVH Dom0 the native memory map is used in order to
craft a tailored memory map for Dom0 taking into account it's memory
limit.
Dom0 memory is always going to be smaller than the total amount
of memory present on the host, so in order to prevent Dom0 from
relocating PCI BARs over
Use a global variable to store the start flags for both PV and PVH.
This allows the xen_initial_domain macro to work properly on PVH.
Signed-off-by: Boris Ostrovsky
Signed-off-by: Roger Pau Monné
---
Cc: Boris Ostrovsky
There's no need to store the xenstore page or event channel in
xen_start_info if they are locally initialized.
This also fixes PVH local xenstore initialization due to the lack of
xen_start_info in that case.
Signed-off-by: Boris Ostrovsky
Signed-off-by: Roger Pau
On PVH MTRR is not initialized by the firmware (because there's no
firmware), so the kernel is started with MTRR disabled which means all
memory accesses are UC.
So far there have been no issues (ie: slowdowns) caused by this
because PVH only supported DomU mode without passed-through devices,
so
When running as PVH Dom0 the native memory map is used in order to
craft a tailored memory map for Dom0 taking into account it's memory
limit.
Dom0 memory is always going to be smaller than the total amount
of memory present on the host, so in order to prevent Dom0 from
relocating PCI BARs over
When running as PVH Dom0 the native memory map is used in order to
craft a tailored memory map for Dom0 taking into account it's memory
limit.
Dom0 memory is always going to be smaller than the total amount
of memory present on the host, so in order to prevent Dom0 from
relocating PCI BARs over
Avoid scheduling vCPUs that are blocked, there's no point in assigning
them to a pCPU because they are not going to run anyway.
Since blocked vCPUs are not assigned to pCPUs after this change, force
a rescheduling when a vCPU is brought up if it's on the waitqueue.
Also when scheduling try to
When using a linker that supports both formats the following error
will be triggered:
efi/buildid.o: file not recognized: File format is ambiguous
efi/buildid.o: matching formats: coff-x86-64 pe-x86-64
Solve this by specifying the buildid.o format to pe-x86-64.
Signed-off-by: Roger Pau Monné
The following errors are generated when compiling Xen with clang 6:
In file included from x86_64/asm-offsets.c:9:
In file included from /root/src/xen/xen/include/xen/sched.h:8:
In file included from /root/src/xen/xen/include/xen/shared.h:6:
In file included from
Disable SMAP in the shim before bouncing the hypercall, or else L0
will fail to get the hypercall buffer.
Signed-off-by: Roger Pau Monné
Reported-by: Fatih Acar
---
Cc: Jan Beulich
Cc: Andrew Cooper
Cc:
This makes the code cleaner because there's no need to declare the
exception_table in assembly, and also fixes the following error when
using clang's integrated assembler:
entry.S:834:15: error: unexpected token in '.rept' directive
.rept 32 - ((. - exception_table) / 8)
^
Since VCPUOP_{up/down} already identity pins vCPU hotplug to pCPU
hotplug also pin the vCPUs to the pCPUs in the scheduler. This prevent
vCPU migration and should improve performance.
While there also use __cpumask_set_cpu instead of cpumask_set_cpu,
there's no need to use the locked variant.
pvshim_fixes_v1
Thanks, Roger.
Roger Pau Monne (6):
xen/pvshim: map vcpu_info earlier for APs
xen/pvh: place the trampoline at page 0x1
xen/pvshim: identity pin shim vCPUs to pCPUs
xen/pvshim: simplify replace_va_mapping code
xen/pvshim: fix coding style issues
firmware/shim: fix build process
Since PVH guest jump straight into trampoline_setup trampoline_phys is
not initialized, thus the trampoline is relocated to address 0.
This works, but has the undesirable effect of having VA 0 mapped to
MFN 0, which means NULL pointed dereferences no longer trigger a page
fault.
In order to
The -printf find option is not POSIX compatible, so replace it with
another rune.
Signed-off-by: Roger Pau Monné
---
Cc: Ian Jackson
Cc: Wei Liu
---
tools/firmware/xen-dir/Makefile | 3 ++-
1 file changed, 2 insertions(+),
integrated assembler. Fully compiling Xen with clang's
integrated assembler will require clang 4.0 or newer.
This series has been tested with clang 3.5, clang 6.0 and gcc 6.4.0.
Thanks, Roger.
Roger Pau Monne (5):
build: filter out command line assembler arguments
x86/clang: fix build
The build with clang is currently broken because clang integrated
assembler requires asm macros to be declared inside the same inline
asm declaration where they are used.
In order to fix this always include indirect_thunk_asm.h in the same
asm declaration where it's being used.
This has been
If the assembler is not used. This happens when using cc -E or cc -S
for example. GCC will just ignore the -Wa,... when the assembler is
not called, but clang will complain loudly and fail.
This is a preparatory change in order to pass assembler arguments when
using clang.
Signed-off-by: Roger
When indirect_thunk_asm.h is instantiated directly into assembly files
CONFIG_INDIRECT_THUNK might not be defined, and thus using .if against
it is wrong.
Add a check to define CONFIG_INDIRECT_THUNK to 0 if not defined, so
that using .if CONFIG_INDIRECT_THUNK is always correct.
This suppresses
This makes the code cleaner because there's no need to declare the
exception_table in assembly, and also fixes the following error when
using clang's integrated assembler:
entry.S:834:15: error: unexpected token in '.rept' directive
.rept 32 - ((. - exception_table) / 8)
^
Clang assembler doesn't support using .skip with non-absolute
expressions:
entry.S:109:15: error: expected absolute expression
.skip .Lcr4_alt_end - .Lcr4_alt, 0x90
^
This usage of .skip was to fill code sections with NOPs in order for
them to be patched at run time if
This makes the code cleaner because there's no need to declare the
exception_table in assembly, and also fixes the following error when
using clang's integrated assembler:
entry.S:834:15: error: unexpected token in '.rept' directive
.rept 32 - ((. - exception_table) / 8)
^
The current usage of acpi_gbl_root_table_list inside the function is
wrong.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/hvm/dom0_build.c | 29 +++--
1 file
Also remove a couple of newlines at the start of function
declarations.
No functional change.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
---
xen/arch/x86/hvm/dom0_build.c | 17 +
1
Signed-off-by: Roger Pau Monné
---
xen/arch/x86/hvm/dom0_build.c | 31 ++-
1 file changed, 18 insertions(+), 13 deletions(-)
diff --git a/xen/arch/x86/hvm/dom0_build.c b/xen/arch/x86/hvm/dom0_build.c
index 830b4345cc..82ee3fe237 100644
---
physmap.
Thanks, Roger.
Roger Pau Monne (3):
pvh/dom0: init variables at declaration time
pvh/dom0: pass address/length to pvh_acpi_table_allowed
pvh/dom0: whitelist PVH Dom0 ACPI tables
xen/arch/x86/hvm/dom0_build.c | 75 +--
1 file changed, 37
So it can be used by both gcc and clang. Just add the Kconfig option
and modify the makefiles so the llvm coverage specific code can be
added in a follow up patch.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
The new shim tests uses the same approach as the PVH one, but doesn't
differentiate between AMD and Intel.
This is the (trimmed) diff of the output from mg-show-flight-runvars:
+test-amd64-amd64-xl-pvshimall_host_di_version2017-12-14
+test-amd64-i386-xl-pvshim all_host_di_version
Previous usage is not correct and would prevent certain updates from
being notified to the monitor client.
For example if (value ^ old) == (PGE | PSE) and mask == PGE this
update would not be notified.
Signed-off-by: Roger Pau Monné
---
Cc: Razvan Cojocaru
.
Thanks, Roger.
Roger Pau Monne (2):
x86/hvm: introduce cr_mask to store trapped bits of CR accesses
vmx/hap: optimize CR4 trapping
xen/arch/x86/hvm/svm/vmcb.c| 1 +
xen/arch/x86/hvm/vmx/vmcs.c| 1 +
xen/arch/x86/hvm/vmx/vmx.c | 39 +++
xen/arch
At the moment this is currently set at VMCS creation and not changed,
but further patches are going to change the CR4 mask at runtime.
Signed-off-by: Roger Pau Monné
---
Cc: Boris Ostrovsky
Cc: Suravee Suthikulpanit
There a bunch of bits in CR4 that should be allowed to be set directly
by the guest without requiring Xen intervention, currently this is
already done by passing through guest writes into the CR4 used when
running in non-root mode, but taking an expensive vmexit in order to
do so.
xenalyze
There a bunch of bits in CR4 that should be allowed to be set directly
by the guest without requiring Xen intervention, currently this is
already done by passing through guest writes into the CR4 used when
running in non-root mode, but taking an expensive vmexit in order to
do so.
xenalyze
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