Update the argument of the as-insn for the Zbb case to verify that Zbb is supported not only by a compiler, but also by an assembler.
Signed-off-by: Oleksii Kurochko <oleksii.kuroc...@gmail.com> --- xen/arch/riscv/arch.mk | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/arch.mk b/xen/arch/riscv/arch.mk index 53f3575e7d..6c53953acb 100644 --- a/xen/arch/riscv/arch.mk +++ b/xen/arch/riscv/arch.mk @@ -11,7 +11,8 @@ riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c riscv-generic-flags := $(riscv-abi-y) -march=$(riscv-march-y) -zbb := $(call as-insn,$(CC) $(riscv-generic-flags)_zbb,"",_zbb) +zbb_insn := "andn t0, t0, t0" +zbb := $(call as-insn,$(CC) $(riscv-generic-flags)_zbb,${zbb_insn},_zbb) zihintpause := $(call as-insn, \ $(CC) $(riscv-generic-flags)_zihintpause,"pause",_zihintpause) -- 2.44.0