we know that there are many pins available in microprocessor chips one of
them is INTR(interrupt Req)

When a CPU receives an Interrupt Request (IRQ), it first checks if it must
react to the interrupt. So-called Maskable Interrupts allow a programmer to
specify that the CPU does ignore it, while Non-Maskeable Interrupt requests
must be serviced.

now if a process wants a control of CPU it sends a positive signal on INTR
pin this will interrupt CPU n this is how CPU is being interrupted.

after that CPU stops its current processing ........


I think now its clear

Regards
Pradeep

On Sun, May 2, 2010 at 10:25 PM, praba garan <prabagara...@gmail.com> wrote:

> @ Pradeep
>
> *CPU stop its current processing and goes to the interrupt subroutine*
>
> you have mentioned that the CPU stops its current processing and goes to
> the interrupt subroutine..
>
> My Question is how does the CPU stops its execution(any special hardware
> involved) because it is busy in executing the current instruction.
>
>
> With Regards,
> Prabagaran.
>
>
>
> On Sun, May 2, 2010 at 4:02 AM, pradeep verma <ppradeep...@gmail.com>wrote:
>
>> lets suppose Processor executing a instruction(process1) and another
>> process2 tries to take the control of CPU so inorder to inform CPU it has to
>> interrupt the CPU right
>> now we know that if interrupt comes CPU stop its current processing and
>> goes to the interrupt subroutine...now CPU knows that its a pre-emption
>> interrupt so CPU first run its short term scheduler(this will inform CPU
>> that the interruting process priority is less or greater ..n if greater than
>> CPU goes to previous process1 preempt it and start executing higher priority
>> process2 )
>>
>> I think its clear
>>
>> Regards
>> Pradeep
>>
>>
>>
>> On Sun, May 2, 2010 at 3:06 AM, praba garan <prabagara...@gmail.com>wrote:
>>
>>> @ Guillermo Garcia
>>>
>>> The link gives the overall abstract idea.
>>> I am talking in register level.
>>> When a user process executes
>>>
>>> 1. PC program counter will contain the address of the next instruction in
>>> user code.
>>> 2. Processor registers(accumulator ...) contain the current instruction
>>> data.
>>>
>>> Then where does the interrupt actually arrives??
>>>
>>> And by that time the user process the control, then who does the
>>> preempting and how??
>>>
>>> With Regards,
>>> Prabagaran.
>>>
>>>
>>>
>>> On Sun, May 2, 2010 at 2:35 AM, Guillermo Garcia 
>>> <gegarci...@gmail.com>wrote:
>>>
>>>>
>>>> read here -> http://en.wikipedia.org/wiki/Preemption_%28computing%29
>>>>
>>>>
>>>>
>>>> Time slice
>>>>
>>>> The period of time for which a process is allowed to run in a preemptive
>>>> multitasking system is generally called the *time slice*, or *quantum*.
>>>> The scheduler is run once every time slice to choose the next process to
>>>> run. If the time slice is too short then the scheduler will consume too 
>>>> much
>>>> processing time.
>>>>
>>>> An interrupt <http://en.wikipedia.org/wiki/Interrupt> is scheduled to
>>>> allow the operating system<http://en.wikipedia.org/wiki/Operating_system>
>>>> kernel <http://en.wikipedia.org/wiki/Kernel_%28computer_science%29> to
>>>> switch between processes when their time slices expire, effectively 
>>>> allowing
>>>> the processor’s time to be shared between a number of tasks, giving the
>>>> illusion that it is dealing with these tasks simultaneously, or
>>>> concurrently. The operating system which controls such a design is called a
>>>> multi-tasking system.
>>>>
>>>>
>>>>
>>>>
>>>> On Sat, May 1, 2010 at 5:26 PM, praba garan <prabagara...@gmail.com>wrote:
>>>>
>>>>> @ Guillermo Garcia
>>>>>
>>>>> Suppose a user program is executing and and clock interrupt arrives..
>>>>> Then who receives the interrupt??
>>>>> Can you xplain me the clock interrupt(like any hardwares involved) bit
>>>>> detailed??
>>>>>
>>>>> With Regards,
>>>>> Prabagaran.
>>>>>
>>>>>
>>>>>
>>>>> On Sun, May 2, 2010 at 1:38 AM, Guillermo Garcia <gegarci...@gmail.com
>>>>> > wrote:
>>>>>
>>>>>> The scheduler takes control with a clock interruption. Then it
>>>>>> analyzes if it has to preempt or not the running task.
>>>>>>
>>>>>> On Sat, May 1, 2010 at 5:00 PM, praba garan 
>>>>>> <prabagara...@gmail.com>wrote:
>>>>>>
>>>>>>> Hi all,
>>>>>>>         I have a doubt in OS.
>>>>>>> The scheduler does the process of preemption.
>>>>>>> And one processor can run atmost 1 instruction at a time.
>>>>>>> Then how & where does the scheduler run??
>>>>>>>
>>>>>>> With Regards,
>>>>>>> Prabagaran.
>>>>>>>
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