From: Alex Hung <alex.h...@amd.com>

The null checks for res_pool->dccg are redundant as it was already
dereferenced previously, as reported by Coverity; therefore the
null checks are removed.

This fixes 6 REVERSE_INULL issues reported by Coverity.

Reviewed-by: Harry Wentland <harry.wentl...@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahf...@amd.com>
Signed-off-by: Alex Hung <alex.h...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c | 2 +-
 drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c   | 2 +-
 drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c   | 2 +-
 drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c   | 2 +-
 drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c   | 2 +-
 drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c | 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c
index 86d871cc74c7..f96adc689055 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c
@@ -240,7 +240,7 @@ void dcn201_init_hw(struct dc *dc)
                res_pool->ref_clocks.xtalin_clock_inKhz =
                        dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency;
 
-               if (res_pool->dccg && res_pool->hubbub) {
+               if (res_pool->hubbub) {
                        
(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,
                                        
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency,
                                        
&res_pool->ref_clocks.dccg_ref_clock_inKhz);
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
index 9ef38a3759b1..567300c3acaa 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c
@@ -656,7 +656,7 @@ void dcn30_init_hw(struct dc *dc)
                res_pool->ref_clocks.xtalin_clock_inKhz =
                                
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency;
 
-               if (res_pool->dccg && res_pool->hubbub) {
+               if (res_pool->hubbub) {
 
                        
(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,
                                        
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency,
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
index 1c8abb417b6e..746c522adf84 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c
@@ -132,7 +132,7 @@ void dcn31_init_hw(struct dc *dc)
                res_pool->ref_clocks.xtalin_clock_inKhz =
                                
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency;
 
-               if (res_pool->dccg && res_pool->hubbub) {
+               if (res_pool->hubbub) {
 
                        
(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,
                                        
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency,
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
index 33b8df995869..a597b2342472 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
@@ -806,7 +806,7 @@ void dcn32_init_hw(struct dc *dc)
                res_pool->ref_clocks.xtalin_clock_inKhz =
                                
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency;
 
-               if (res_pool->dccg && res_pool->hubbub) {
+               if (res_pool->hubbub) {
                        
(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,
                                        
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency,
                                        
&res_pool->ref_clocks.dccg_ref_clock_inKhz);
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
index d894c52bfdaf..a1e1f76bfde7 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c
@@ -188,7 +188,7 @@ void dcn35_init_hw(struct dc *dc)
                res_pool->ref_clocks.xtalin_clock_inKhz =
                                
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency;
 
-               if (res_pool->dccg && res_pool->hubbub) {
+               if (res_pool->hubbub) {
 
                        
(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,
                                
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency,
diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
index cb8e417fb032..6ba2e1cd20c7 100644
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
@@ -259,7 +259,7 @@ void dcn401_init_hw(struct dc *dc)
                res_pool->ref_clocks.xtalin_clock_inKhz =
                                
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency;
 
-               if (res_pool->dccg && res_pool->hubbub) {
+               if (res_pool->hubbub) {
                        
(res_pool->dccg->funcs->get_dccg_ref_freq)(res_pool->dccg,
                                        
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency,
                                        
&res_pool->ref_clocks.dccg_ref_clock_inKhz);
-- 
2.45.1

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