[AMD Official Use Only - AMD Internal Distribution Only] Reviewed-by: Ruijing Dong <[email protected]>
Thanks, Ruijing -----Original Message----- From: Benjamin Cheng <[email protected]> Sent: Wednesday, April 8, 2026 8:54 AM To: Deucher, Alexander <[email protected]>; Koenig, Christian <[email protected]>; Liu, Leo <[email protected]>; [email protected] Cc: Wu, David <[email protected]>; Dong, Ruijing <[email protected]>; Cheng, Benjamin <[email protected]> Subject: [PATCH v3 1/3] drm/amdgpu/vcn: Move RDECODE_* to amdgpu_vcn.h These defines can be shared. Move them and prefix with VCN_DEC_ instead. Signed-off-by: Benjamin Cheng <[email protected]> --- v3: Renamed to VCN_DEC_ drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 3 +++ drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 7 ++----- drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 7 ++----- drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c | 3 --- 4 files changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h index 82624b44e661..e72687246235 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h @@ -57,6 +57,9 @@ #define VCN_DEC_SW_CMD_REG_WRITE 0x0000000b #define VCN_DEC_SW_CMD_REG_WAIT 0x0000000c +#define VCN_DEC_MSG_CREATE 0x00000000 +#define VCN_DEC_MESSAGE_CREATE 0x00000001 + #define VCN_ENC_CMD_NO_OP 0x00000000 #define VCN_ENC_CMD_END 0x00000001 #define VCN_ENC_CMD_IB 0x00000002 diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c index 6fb4fcdbba4f..64531ad56c48 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c @@ -58,9 +58,6 @@ #define VCN_INSTANCES_SIENNA_CICHLID 2 #define DEC_SW_RING_ENABLED FALSE -#define RDECODE_MSG_CREATE 0x00000000 -#define RDECODE_MESSAGE_CREATE 0x00000001 - static const struct amdgpu_hwip_reg_entry vcn_reg_list_3_0[] = { SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_POWER_STATUS), SOC15_REG_ENTRY_STR(VCN, 0, mmUVD_STATUS), @@ -1957,7 +1954,7 @@ static int vcn_v3_0_dec_msg(struct amdgpu_cs_parser *p, struct amdgpu_job *job, goto out; } - if (msg[3] != RDECODE_MSG_CREATE) + if (msg[3] != VCN_DEC_MSG_CREATE) goto out; len_dw = msg[1] / 4; @@ -1973,7 +1970,7 @@ static int vcn_v3_0_dec_msg(struct amdgpu_cs_parser *p, struct amdgpu_job *job, for (i = 0, msg = &msg[6]; i < num_buffers; ++i, msg += 4) { uint32_t offset, size, *create; - if (msg[0] != RDECODE_MESSAGE_CREATE) + if (msg[0] != VCN_DEC_MESSAGE_CREATE) continue; offset = msg[1]; diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c index 5dec92691f73..a89e316a4add 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c @@ -50,9 +50,6 @@ #define VCN_HARVEST_MMSCH 0 -#define RDECODE_MSG_CREATE 0x00000000 -#define RDECODE_MESSAGE_CREATE 0x00000001 - static const struct amdgpu_hwip_reg_entry vcn_reg_list_4_0[] = { SOC15_REG_ENTRY_STR(VCN, 0, regUVD_POWER_STATUS), SOC15_REG_ENTRY_STR(VCN, 0, regUVD_STATUS), @@ -1874,7 +1871,7 @@ static int vcn_v4_0_dec_msg(struct amdgpu_cs_parser *p, struct amdgpu_job *job, goto out; } - if (msg[3] != RDECODE_MSG_CREATE) + if (msg[3] != VCN_DEC_MSG_CREATE) goto out; len_dw = msg[1] / 4; @@ -1890,7 +1887,7 @@ static int vcn_v4_0_dec_msg(struct amdgpu_cs_parser *p, struct amdgpu_job *job, for (i = 0, msg = &msg[6]; i < num_buffers; ++i, msg += 4) { uint32_t offset, size, *create; - if (msg[0] != RDECODE_MESSAGE_CREATE) + if (msg[0] != VCN_DEC_MESSAGE_CREATE) continue; offset = msg[1]; diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c index 1f6a22983c0d..cbbc02d68695 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c @@ -50,9 +50,6 @@ #define VCN_HARVEST_MMSCH 0 -#define RDECODE_MSG_CREATE 0x00000000 -#define RDECODE_MESSAGE_CREATE 0x00000001 - static const struct amdgpu_hwip_reg_entry vcn_reg_list_4_0_5[] = { SOC15_REG_ENTRY_STR(VCN, 0, regUVD_POWER_STATUS), SOC15_REG_ENTRY_STR(VCN, 0, regUVD_STATUS), -- 2.53.0
