Add a render-node WAIT_EVENT ioctl for waiting on a specific kernel-defined event type and copying event metadata to userspace.
This ioctl is the metadata-carrying half of the event interface. It is separate from the EVENTFD notification path. The UAPI supports: - event-type selection - optional queue/source selection - timeout - metadata copy to userspace - single-consumer delivery of the first matching event Cc: Alex Deucher <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Srinivasan Shanmugam <[email protected]> --- include/uapi/drm/amdgpu_drm.h | 103 ++++++++++++++++++++++++++++++++++ 1 file changed, 103 insertions(+) diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index 3dffd9e581a1..d2038d38645a 100644 --- a/include/uapi/drm/amdgpu_drm.h +++ b/include/uapi/drm/amdgpu_drm.h @@ -40,6 +40,7 @@ extern "C" { #define DRM_AMDGPU_GEM_CREATE 0x00 #define DRM_AMDGPU_EVENTFD 0x1A +#define DRM_AMDGPU_WAIT_EVENT 0x1B #define DRM_AMDGPU_GEM_MMAP 0x01 #define DRM_AMDGPU_CTX 0x02 #define DRM_AMDGPU_BO_LIST 0x03 @@ -82,6 +83,8 @@ extern "C" { #define DRM_IOCTL_AMDGPU_GEM_LIST_HANDLES DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_LIST_HANDLES, struct drm_amdgpu_gem_list_handles) #define DRM_IOCTL_AMDGPU_EVENTFD \ DRM_IOW(DRM_COMMAND_BASE + DRM_AMDGPU_EVENTFD, struct drm_amdgpu_eventfd) +#define DRM_IOCTL_AMDGPU_WAIT_EVENT \ + DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_WAIT_EVENT, struct drm_amdgpu_wait_event) /** * DOC: memory domains @@ -247,6 +250,106 @@ struct drm_amdgpu_eventfd { __u32 flags; }; +/** + * struct drm_amdgpu_wait_event_queue - queue-scoped event metadata + * @queue_id: queue selector + * @status: event-specific status or error code + * @data0: event-specific payload + * @data1: event-specific payload + */ +struct drm_amdgpu_wait_event_queue { + __u32 queue_id; + __u32 status; + __u64 data0; + __u64 data1; +}; + +/** + * struct drm_amdgpu_wait_event_memory - memory exception metadata + * @queue_id: queue selector if applicable, else 0 + * @fault_status: device-specific fault or exception status + * @va: faulting virtual address if applicable + * @data0: event-specific payload + */ +struct drm_amdgpu_wait_event_memory { + __u32 queue_id; + __u32 fault_status; + __u64 va; + __u64 data0; +}; + +/** + * struct drm_amdgpu_wait_event_reset - reset metadata + * @queue_id: queue selector if queue-scoped, else 0 + * @reset_cause: reset cause or reason code + * @data0: event-specific payload + * @data1: event-specific payload + */ +struct drm_amdgpu_wait_event_reset { + __u32 queue_id; + __u32 reset_cause; + __u64 data0; + __u64 data1; +}; + +/** + * struct drm_amdgpu_wait_event_scratch - scratch event metadata + * @queue_id: queue selector + * @error_code: scratch-related error code + * @requested_bytes: requested scratch size + * @available_bytes: available scratch size if known + */ +struct drm_amdgpu_wait_event_scratch { + __u32 queue_id; + __u32 error_code; + __u64 requested_bytes; + __u64 available_bytes; +}; + +/** + * struct drm_amdgpu_wait_event_data - returned event record + * @event_type: kernel-defined event type + * @queue_id: queue selector, or 0 for GPU-scoped events + * @flags: reserved, must be 0 + * @reserved: reserved, must be 0 + * @seqno: per-file event sequence number + * @u: event-specific metadata + */ +struct drm_amdgpu_wait_event_data { + __u32 event_type; + __u32 queue_id; + __u32 flags; + __u32 reserved; + __u64 seqno; + union { + struct drm_amdgpu_wait_event_queue queue; + struct drm_amdgpu_wait_event_memory memory; + struct drm_amdgpu_wait_event_reset reset; + struct drm_amdgpu_wait_event_scratch scratch; + } u; +}; + +/** + * struct drm_amdgpu_wait_event - wait for a render-node event + * @event_type: kernel-defined event type + * @queue_id: queue selector for queue-scoped events, 0 for GPU-scoped events + * @timeout_ns: relative timeout in nanoseconds; negative means wait forever + * @out_ptr: userspace pointer to struct drm_amdgpu_wait_event_data + * @out_size: size of userspace output buffer + * @flags: must be 0 + * + * Wait for the selected event and copy the first matching event record to + * userspace. Matching records are consumed by a single waiter. + */ +struct drm_amdgpu_wait_event { + __u32 event_type; + __u32 queue_id; + __s64 timeout_ns; + __u64 out_ptr; + __u32 out_size; + __u32 flags; +}; + /** Opcode to create new residency list. */ #define AMDGPU_BO_LIST_OP_CREATE 0 /** Opcode to destroy previously created residency list */ -- 2.34.1
