commit febc4e9b46f452821c8cb97abd1aa70aef64fa57 Author: Robert Khasanov Date: Wed Aug 20 18:56:07 2014 +0400 [x86] Added _addcarry_ and _subborrow_ intrinsics diff --git a/include/llvm/IR/IntrinsicsX86.td b/include/llvm/IR/IntrinsicsX86.td index 5fe9040..bb45b2c0 100644 --- a/include/llvm/IR/IntrinsicsX86.td +++ b/include/llvm/IR/IntrinsicsX86.td @@ -2751,40 +2751,52 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // These are declared side-effecting so they don't get eliminated by CSE or // LICM. def int_x86_rdrand_16 : Intrinsic<[llvm_i16_ty, llvm_i32_ty], [], []>; def int_x86_rdrand_32 : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [], []>; def int_x86_rdrand_64 : Intrinsic<[llvm_i64_ty, llvm_i32_ty], [], []>; def int_x86_rdseed_16 : Intrinsic<[llvm_i16_ty, llvm_i32_ty], [], []>; def int_x86_rdseed_32 : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [], []>; def int_x86_rdseed_64 : Intrinsic<[llvm_i64_ty, llvm_i32_ty], [], []>; } //===----------------------------------------------------------------------===// // ADX let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_addcarryx_u32: GCCBuiltin<"__builtin_ia32_addcarryx_u32">, Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], [IntrReadWriteArgMem]>; def int_x86_addcarryx_u64: GCCBuiltin<"__builtin_ia32_addcarryx_u64">, Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty, llvm_ptr_ty], [IntrReadWriteArgMem]>; + def int_x86_addcarry_u32: GCCBuiltin<"__builtin_ia32_addcarry_u32">, + Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i32_ty, llvm_i32_ty, + llvm_ptr_ty], [IntrReadWriteArgMem]>; + def int_x86_addcarry_u64: GCCBuiltin<"__builtin_ia32_addcarry_u64">, + Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty, + llvm_ptr_ty], [IntrReadWriteArgMem]>; + def int_x86_subborrow_u32: GCCBuiltin<"__builtin_ia32_subborrow_u32">, + Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i32_ty, llvm_i32_ty, + llvm_ptr_ty], [IntrReadWriteArgMem]>; + def int_x86_subborrow_u64: GCCBuiltin<"__builtin_ia32_subborrow_u64">, + Intrinsic<[llvm_i8_ty], [llvm_i8_ty, llvm_i64_ty, llvm_i64_ty, + llvm_ptr_ty], [IntrReadWriteArgMem]>; } //===----------------------------------------------------------------------===// // RTM intrinsics. Transactional Memory support. let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_xbegin : GCCBuiltin<"__builtin_ia32_xbegin">, Intrinsic<[llvm_i32_ty], [], []>; def int_x86_xend : GCCBuiltin<"__builtin_ia32_xend">, Intrinsic<[], [], []>; def int_x86_xabort : GCCBuiltin<"__builtin_ia32_xabort">, Intrinsic<[], [llvm_i8_ty], [IntrNoReturn]>; def int_x86_xtest : GCCBuiltin<"__builtin_ia32_xtest">, Intrinsic<[llvm_i32_ty], [], []>; } //===----------------------------------------------------------------------===// // AVX512 // Mask ops diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 68d9da8..684893b 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -15423,40 +15423,48 @@ static void InitIntinsicsMap() { IntrMap.insert(std::make_pair(Intrinsic::x86_rdrand_64, IntrinsicData(RDRAND, X86ISD::RDRAND, 0))); IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_16, IntrinsicData(RDSEED, X86ISD::RDSEED, 0))); IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_32, IntrinsicData(RDSEED, X86ISD::RDSEED, 0))); IntrMap.insert(std::make_pair(Intrinsic::x86_rdseed_64, IntrinsicData(RDSEED, X86ISD::RDSEED, 0))); IntrMap.insert(std::make_pair(Intrinsic::x86_xtest, IntrinsicData(XTEST, X86ISD::XTEST, 0))); IntrMap.insert(std::make_pair(Intrinsic::x86_rdtsc, IntrinsicData(RDTSC, X86ISD::RDTSC_DAG, 0))); IntrMap.insert(std::make_pair(Intrinsic::x86_rdtscp, IntrinsicData(RDTSC, X86ISD::RDTSCP_DAG, 0))); IntrMap.insert(std::make_pair(Intrinsic::x86_rdpmc, IntrinsicData(RDPMC, X86ISD::RDPMC_DAG, 0))); IntrMap.insert(std::make_pair(Intrinsic::x86_addcarryx_u32, IntrinsicData(ADX, X86ISD::ADC, 0))); IntrMap.insert(std::make_pair(Intrinsic::x86_addcarryx_u64, IntrinsicData(ADX, X86ISD::ADC, 0))); + IntrMap.insert(std::make_pair(Intrinsic::x86_addcarry_u32, + IntrinsicData(ADX, X86ISD::ADC, 0))); + IntrMap.insert(std::make_pair(Intrinsic::x86_addcarry_u64, + IntrinsicData(ADX, X86ISD::ADC, 0))); + IntrMap.insert(std::make_pair(Intrinsic::x86_subborrow_u32, + IntrinsicData(ADX, X86ISD::SBB, 0))); + IntrMap.insert(std::make_pair(Intrinsic::x86_subborrow_u64, + IntrinsicData(ADX, X86ISD::SBB, 0))); Initialized = true; } static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget *Subtarget, SelectionDAG &DAG) { InitIntinsicsMap(); unsigned IntNo = cast(Op.getOperand(1))->getZExtValue(); std::map < unsigned, IntrinsicData>::const_iterator itr = IntrMap.find(IntNo); if (itr == IntrMap.end()) return SDValue(); SDLoc dl(Op); IntrinsicData Intr = itr->second; switch(Intr.Type) { case RDSEED: case RDRAND: { // Emit the node with the right value type. SDVTList VTs = DAG.getVTList(Op->getValueType(0), MVT::Glue, MVT::Other); SDValue Result = DAG.getNode(Intr.Opc0, dl, VTs, Op.getOperand(0)); @@ -15515,41 +15523,41 @@ static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget *Subtarget, getReadTimeStampCounter(Op.getNode(), dl, Intr.Opc0, DAG, Subtarget, Results); return DAG.getMergeValues(Results, dl); } // Read Performance Monitoring Counters. case RDPMC: { SmallVector Results; getReadPerformanceCounter(Op.getNode(), dl, DAG, Subtarget, Results); return DAG.getMergeValues(Results, dl); } // XTEST intrinsics. case XTEST: { SDVTList VTs = DAG.getVTList(Op->getValueType(0), MVT::Other); SDValue InTrans = DAG.getNode(X86ISD::XTEST, dl, VTs, Op.getOperand(0)); SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, DAG.getConstant(X86::COND_NE, MVT::i8), InTrans); SDValue Ret = DAG.getNode(ISD::ZERO_EXTEND, dl, Op->getValueType(0), SetCC); return DAG.getNode(ISD::MERGE_VALUES, dl, Op->getVTList(), Ret, SDValue(InTrans.getNode(), 1)); } - // ADC/ADCX + // ADC/ADCX/SBB case ADX: { SmallVector Results; SDVTList CFVTs = DAG.getVTList(Op->getValueType(0), MVT::Other); SDVTList VTs = DAG.getVTList(Op.getOperand(3)->getValueType(0), MVT::Other); SDValue GenCF = DAG.getNode(X86ISD::ADD, dl, CFVTs, Op.getOperand(2), DAG.getConstant(-1, MVT::i8)); SDValue Res = DAG.getNode(Intr.Opc0, dl, VTs, Op.getOperand(3), Op.getOperand(4), GenCF.getValue(1)); SDValue Store = DAG.getStore(Op.getOperand(0), dl, Res.getValue(0), Op.getOperand(5), MachinePointerInfo(), false, false, 0); SDValue SetCC = DAG.getNode(X86ISD::SETCC, dl, MVT::i8, DAG.getConstant(X86::COND_B, MVT::i8), Res.getValue(1)); Results.push_back(SetCC); Results.push_back(Store); return DAG.getMergeValues(Results, dl); } } llvm_unreachable("Unknown Intrinsic Type"); diff --git a/test/CodeGen/X86/adx-intrinsics.ll b/test/CodeGen/X86/adx-intrinsics.ll index 2711055..0498177 100644 --- a/test/CodeGen/X86/adx-intrinsics.ll +++ b/test/CodeGen/X86/adx-intrinsics.ll @@ -1,26 +1,77 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 --show-mc-encoding| FileCheck %s --check-prefix=NOADX --check-prefix=CHECK ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=broadwell --show-mc-encoding| FileCheck %s --check-prefix=ADX --check-prefix=CHECK declare i8 @llvm.x86.addcarryx.u32(i8, i32, i32, i8*) define i8 @test_addcarryx_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { ; CHECK-LABEL: test_addcarryx_u32 ; CHECK: addb ; ADX: adcxl ; CHECK: setb ; CHECK: retq %ret = tail call i8 @llvm.x86.addcarryx.u32(i8 %c, i32 %a, i32 %b, i8* %ptr) ret i8 %ret; } declare i8 @llvm.x86.addcarryx.u64(i8, i64, i64, i8*) define i8 @test_addcarryx_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { ; CHECK-LABEL: test_addcarryx_u64 ; CHECK: addb ; ADX: adcxq ; CHECK: setb ; CHECK: retq %ret = tail call i8 @llvm.x86.addcarryx.u64(i8 %c, i64 %a, i64 %b, i8* %ptr) ret i8 %ret; } +declare i8 @llvm.x86.addcarry.u32(i8, i32, i32, i8*) + +define i8 @test_addcarry_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { +; CHECK-LABEL: test_addcarry_u32 +; CHECK: addb +; ADX: adcxl +; NOADX: adcl +; CHECK: setb +; CHECK: retq + %ret = tail call i8 @llvm.x86.addcarry.u32(i8 %c, i32 %a, i32 %b, i8* %ptr) + ret i8 %ret; +} + +declare i8 @llvm.x86.addcarry.u64(i8, i64, i64, i8*) + +define i8 @test_addcarry_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { +; CHECK-LABEL: test_addcarry_u64 +; CHECK: addb +; ADX: adcxq +; NOADX: adcq +; CHECK: setb +; CHECK: retq + %ret = tail call i8 @llvm.x86.addcarry.u64(i8 %c, i64 %a, i64 %b, i8* %ptr) + ret i8 %ret; +} + +declare i8 @llvm.x86.subborrow.u32(i8, i32, i32, i8*) + +define i8 @test_subborrow_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { +; CHECK-LABEL: test_subborrow_u32 +; CHECK: addb +; CHECK: sbbl +; CHECK: setb +; CHECK: retq + %ret = tail call i8 @llvm.x86.subborrow.u32(i8 %c, i32 %a, i32 %b, i8* %ptr) + ret i8 %ret; +} + +declare i8 @llvm.x86.subborrow.u64(i8, i64, i64, i8*) + +define i8 @test_subborrow_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { +; CHECK-LABEL: test_subborrow_u64 +; CHECK: addb +; CHECK: sbbq +; CHECK: setb +; CHECK: retq + %ret = tail call i8 @llvm.x86.subborrow.u64(i8 %c, i64 %a, i64 %b, i8* %ptr) + ret i8 %ret; +} +