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In clang/include/clang/Basic/Builtins.def, the argument type of __builtin_clz and __builtin_ctz are defined `iUi` and __builtin_clzl and __builtin_ctzl are defined `iULi`. clz/ctz are similar to RISC-V's clz_32 and ctz_32. clzl/ctzl are similar to RISC-V's clz_64 and ctz_64. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D153235 Files: clang/include/clang/Basic/BuiltinsRISCV.def clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c Index: clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c =================================================================== --- clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c +++ clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c @@ -34,7 +34,7 @@ // RV64ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP0]], i1 false) // RV64ZBB-NEXT: ret i32 [[TMP1]] // -int clz_32(int a) { +int clz_32(unsigned int a) { return __builtin_riscv_clz_32(a); } @@ -46,7 +46,7 @@ // RV64ZBB-NEXT: [[TMP1:%.*]] = call i64 @llvm.ctlz.i64(i64 [[TMP0]], i1 false) // RV64ZBB-NEXT: ret i64 [[TMP1]] // -long clz_64(long a) { +long clz_64(unsigned long a) { return __builtin_riscv_clz_64(a); } @@ -58,7 +58,7 @@ // RV64ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP0]], i1 false) // RV64ZBB-NEXT: ret i32 [[TMP1]] // -int ctz_32(int a) { +int ctz_32(unsigned int a) { return __builtin_riscv_ctz_32(a); } @@ -70,6 +70,6 @@ // RV64ZBB-NEXT: [[TMP1:%.*]] = call i64 @llvm.cttz.i64(i64 [[TMP0]], i1 false) // RV64ZBB-NEXT: ret i64 [[TMP1]] // -long ctz_64(long a) { +long ctz_64(unsigned long a) { return __builtin_riscv_ctz_64(a); } \ No newline at end of file Index: clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c =================================================================== --- clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c +++ clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c @@ -22,7 +22,7 @@ // RV32ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP0]], i1 false) // RV32ZBB-NEXT: ret i32 [[TMP1]] // -int clz_32(int a) { +int clz_32(unsigned int a) { return __builtin_riscv_clz_32(a); } @@ -34,6 +34,6 @@ // RV32ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP0]], i1 false) // RV32ZBB-NEXT: ret i32 [[TMP1]] // -int ctz_32(int a) { +int ctz_32(unsigned int a) { return __builtin_riscv_ctz_32(a); } \ No newline at end of file Index: clang/include/clang/Basic/BuiltinsRISCV.def =================================================================== --- clang/include/clang/Basic/BuiltinsRISCV.def +++ clang/include/clang/Basic/BuiltinsRISCV.def @@ -18,10 +18,10 @@ // Zbb extension TARGET_BUILTIN(__builtin_riscv_orc_b_32, "ZiZi", "nc", "zbb") TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "zbb,64bit") -TARGET_BUILTIN(__builtin_riscv_clz_32, "ZiZi", "nc", "zbb|xtheadbb") -TARGET_BUILTIN(__builtin_riscv_clz_64, "WiWi", "nc", "zbb|xtheadbb,64bit") -TARGET_BUILTIN(__builtin_riscv_ctz_32, "ZiZi", "nc", "zbb") -TARGET_BUILTIN(__builtin_riscv_ctz_64, "WiWi", "nc", "zbb,64bit") +TARGET_BUILTIN(__builtin_riscv_clz_32, "iUi", "nc", "zbb|xtheadbb") +TARGET_BUILTIN(__builtin_riscv_clz_64, "iULi", "nc", "zbb|xtheadbb,64bit") +TARGET_BUILTIN(__builtin_riscv_ctz_32, "iUi", "nc", "zbb") +TARGET_BUILTIN(__builtin_riscv_ctz_64, "iULi", "nc", "zbb,64bit") // Zbc or Zbkc extension TARGET_BUILTIN(__builtin_riscv_clmul, "LiLiLi", "nc", "zbc|zbkc")
Index: clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c =================================================================== --- clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c +++ clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbb.c @@ -34,7 +34,7 @@ // RV64ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP0]], i1 false) // RV64ZBB-NEXT: ret i32 [[TMP1]] // -int clz_32(int a) { +int clz_32(unsigned int a) { return __builtin_riscv_clz_32(a); } @@ -46,7 +46,7 @@ // RV64ZBB-NEXT: [[TMP1:%.*]] = call i64 @llvm.ctlz.i64(i64 [[TMP0]], i1 false) // RV64ZBB-NEXT: ret i64 [[TMP1]] // -long clz_64(long a) { +long clz_64(unsigned long a) { return __builtin_riscv_clz_64(a); } @@ -58,7 +58,7 @@ // RV64ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP0]], i1 false) // RV64ZBB-NEXT: ret i32 [[TMP1]] // -int ctz_32(int a) { +int ctz_32(unsigned int a) { return __builtin_riscv_ctz_32(a); } @@ -70,6 +70,6 @@ // RV64ZBB-NEXT: [[TMP1:%.*]] = call i64 @llvm.cttz.i64(i64 [[TMP0]], i1 false) // RV64ZBB-NEXT: ret i64 [[TMP1]] // -long ctz_64(long a) { +long ctz_64(unsigned long a) { return __builtin_riscv_ctz_64(a); } \ No newline at end of file Index: clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c =================================================================== --- clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c +++ clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb.c @@ -22,7 +22,7 @@ // RV32ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP0]], i1 false) // RV32ZBB-NEXT: ret i32 [[TMP1]] // -int clz_32(int a) { +int clz_32(unsigned int a) { return __builtin_riscv_clz_32(a); } @@ -34,6 +34,6 @@ // RV32ZBB-NEXT: [[TMP1:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP0]], i1 false) // RV32ZBB-NEXT: ret i32 [[TMP1]] // -int ctz_32(int a) { +int ctz_32(unsigned int a) { return __builtin_riscv_ctz_32(a); } \ No newline at end of file Index: clang/include/clang/Basic/BuiltinsRISCV.def =================================================================== --- clang/include/clang/Basic/BuiltinsRISCV.def +++ clang/include/clang/Basic/BuiltinsRISCV.def @@ -18,10 +18,10 @@ // Zbb extension TARGET_BUILTIN(__builtin_riscv_orc_b_32, "ZiZi", "nc", "zbb") TARGET_BUILTIN(__builtin_riscv_orc_b_64, "WiWi", "nc", "zbb,64bit") -TARGET_BUILTIN(__builtin_riscv_clz_32, "ZiZi", "nc", "zbb|xtheadbb") -TARGET_BUILTIN(__builtin_riscv_clz_64, "WiWi", "nc", "zbb|xtheadbb,64bit") -TARGET_BUILTIN(__builtin_riscv_ctz_32, "ZiZi", "nc", "zbb") -TARGET_BUILTIN(__builtin_riscv_ctz_64, "WiWi", "nc", "zbb,64bit") +TARGET_BUILTIN(__builtin_riscv_clz_32, "iUi", "nc", "zbb|xtheadbb") +TARGET_BUILTIN(__builtin_riscv_clz_64, "iULi", "nc", "zbb|xtheadbb,64bit") +TARGET_BUILTIN(__builtin_riscv_ctz_32, "iUi", "nc", "zbb") +TARGET_BUILTIN(__builtin_riscv_ctz_64, "iULi", "nc", "zbb,64bit") // Zbc or Zbkc extension TARGET_BUILTIN(__builtin_riscv_clmul, "LiLiLi", "nc", "zbc|zbkc")
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