================
@@ -90,6 +92,41 @@ static mlir::Value getMaskVecValue(CIRGenFunction &cgf,
const CallExpr *expr,
return maskVec;
}
+static mlir::Value emitX86FunnelShift(CIRGenFunction &cgf, const CallExpr *e,
+ mlir::Value &op0, mlir::Value &op1,
+ mlir::Value &amt, bool isRight) {
+ auto &builder = cgf.getBuilder();
+ auto op0Ty = op0.getType();
+
+ // Amount may be scalar immediate, in which case create a splat vector.
+ // Funnel shifts amounts are treated as modulo and types are all power-of-2
+ // so we only care about the lowest log2 bits anyway.
+ if (amt.getType() != op0Ty) {
+ auto vecTy = mlir::cast<cir::VectorType>(op0Ty);
+ auto numElems = vecTy.getSize();
+
+ auto amtTy = mlir::cast<cir::IntType>(amt.getType());
+ auto vecElemTy = mlir::cast<cir::IntType>(vecTy.getElementType());
+
+ // Cast to same width unsigned if not already unsigned.
+ if (amtTy.isSigned()) {
+ auto unsignedAmtTy = builder.getUIntNTy(amtTy.getWidth());
+ amt = builder.createIntCast(amt,
+
builder.getUIntNTy(unsignedAmtTy.getWidth()));
+ }
+ // Cast the unsigned `amt` to operand element type's width unsigned.
+ auto unsingedVecElemType = builder.getUIntNTy(vecElemTy.getWidth());
+ amt = builder.createIntCast(amt, unsingedVecElemType);
----------------
moar55 wrote:
So passing `amt` -30 for instance when widening it and make it unsigned in one
gave sth like this LLVMIR:
```
%5 = bitcast <2 x i64> %4 to <4 x i32>
%6 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %5, <4 x i32> %5, <4 x i32>
splat (i32 -30))
```
when the OGCG should be:
```
%1 = bitcast <2 x i64> %0 to <4 x i32>
%2 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %1, <4 x i32> %1, <4 x i32>
splat (i32 226))
```
https://github.com/llvm/llvm-project/pull/169566
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