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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=8603



------- Additional Comments From [EMAIL PROTECTED]  2003-05-26 06:34 -------
Subject: [Bug target/8603] [Alpha] s?addl pattern doesn't work

> ------- Additional Comments From [EMAIL PROTECTED]  2003-05-26 05:13 -------
> with gcc 3.2.3, I get the reported behavior. With gcc 3.3 branch and
> mainline (20030524) I the following result. Is this correct? Thanks,
> 
> test.o:     file format elf64-alpha
> 
> Disassembly of section .text:
> 
> 0000000000000000 <f>:
>    0:   41 04 11 42     s4addq  a0,a1,t0
>    4:   00 00 e1 43     sextl   t0,v0
>    8:   01 80 fa 6b     ret
>    c:   00 00 fe 2f     unop    

No, that is actually the same. The two instructions should be folded
into a single s4addl a0,a1,v0. There is a pattern for that, it even
looks correct to me and used to work, but it doesn't for some
reason...





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