commit 212e155b14636edec1aebe9a003a727e1250b242 Author: Bjorn Helgaas Date: Tue Aug 23 11:56:26 2011 -0600 x86, ioapic: Reserve less space for IOAPICs Previously we reserved 1024 bytes, but that's more space than the IOAPIC consumes, and it can cause conflicts with nearby devices. Also, delay the IOAPIC output a bit so we can print the actual range we claim. diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h index 34595d5..75074a5 100644 --- a/arch/x86/include/asm/apicdef.h +++ b/arch/x86/include/asm/apicdef.h @@ -12,10 +12,11 @@ #define APIC_DEFAULT_PHYS_BASE 0xfee00000 /* - * This is the IO-APIC register space as specified - * by Intel docs: + * I/O APICs are accessed indirectly via an index/data pair and an EOI + * register. For example, see sec 13.5.1, "APIC Register Map," in the + * Intel ICH10 datasheet and the struct io_apic definition. */ -#define IO_APIC_SLOT_SIZE 1024 +#define IO_APIC_SLOT_SIZE 68 #define APIC_ID 0x20 diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 8eb863e..c6e0ba1 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -3876,6 +3876,7 @@ void __init ioapic_and_gsi_init(void) { unsigned long ioapic_phys, idx = FIX_IO_APIC_BASE_0; struct resource *ioapic_res; + struct mp_ioapic_gsi *gsi_cfg; int i; ioapic_res = ioapic_setup_resources(nr_ioapics); @@ -3908,6 +3909,14 @@ fake_ioapic_page: ioapic_res->start = ioapic_phys; ioapic_res->end = ioapic_phys + IO_APIC_SLOT_SIZE - 1; + + gsi_cfg = mp_ioapic_gsi_routing(i); + + printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, %pR, " + "GSI %d-%d\n", i, mpc_ioapic_id(i), + mpc_ioapic_ver(i), ioapic_res, + gsi_cfg->gsi_base, gsi_cfg->gsi_end); + ioapic_res++; } @@ -4016,11 +4025,6 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) if (gsi_cfg->gsi_end >= gsi_top) gsi_top = gsi_cfg->gsi_end + 1; - printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, " - "GSI %d-%d\n", idx, mpc_ioapic_id(idx), - mpc_ioapic_ver(idx), mpc_ioapic_addr(idx), - gsi_cfg->gsi_base, gsi_cfg->gsi_end); - nr_ioapics++; }