One last thing:

On 9/20/22 00:01, Jeff Brasen wrote:
Introduce the CM_ARM_CPC_INFO CmObj in the ArmNameSpaceObjects.
This allows to describe CPC information, as described in ACPI 6.4,
s8.4.7.1 "_CPC (Continuous Performance Control)".

Signed-off-by: Jeff Brasen <jbra...@nvidia.com>
---
  .../Include/ArmNameSpaceObjects.h             |  60 ++++++---
  DynamicTablesPkg/Include/Library/AmlCpcInfo.h | 124 ++++++++++++++++++
  .../ConfigurationManagerObjectParser.c        |  80 +++++++++++
  3 files changed, 247 insertions(+), 17 deletions(-)
  create mode 100644 DynamicTablesPkg/Include/Library/AmlCpcInfo.h

diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h 
b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
index 102e0f96be..ea5bf81070 100644
--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
@@ -14,6 +14,7 @@
  #define ARM_NAMESPACE_OBJECTS_H_
#include <StandardNameSpaceObjects.h>
+#include <Library/AmlCpcInfo.h>
#pragma pack(1) @@ -63,6 +64,7 @@ typedef enum ArmObjectID {
    EArmObjPciInterruptMapInfo,          ///< 39 - Pci Interrupt Map Info
    EArmObjRmr,                          ///< 40 - Reserved Memory Range Node
    EArmObjMemoryRangeDescriptor,        ///< 41 - Memory Range Descriptor
+  EArmObjCpcInfo,                      ///< 42 - Continuous Performance 
Control Info
    EArmObjMax
  } EARM_OBJECT_ID;
@@ -97,99 +99,105 @@ typedef struct CmArmPowerManagementProfileInfo {
  */
  typedef struct CmArmGicCInfo {
    /// The GIC CPU Interface number.
-  UINT32    CPUInterfaceNumber;
+  UINT32             CPUInterfaceNumber;
/** The ACPI Processor UID. This must match the
        _UID of the CPU Device object information described
        in the DSDT/SSDT for the CPU.
    */
-  UINT32    AcpiProcessorUid;
+  UINT32             AcpiProcessorUid;
/** The flags field as described by the GICC structure
        in the ACPI Specification.
    */
-  UINT32    Flags;
+  UINT32             Flags;
/** The parking protocol version field as described by
      the GICC structure in the ACPI Specification.
    */
-  UINT32    ParkingProtocolVersion;
+  UINT32             ParkingProtocolVersion;
/** The Performance Interrupt field as described by
        the GICC structure in the ACPI Specification.
    */
-  UINT32    PerformanceInterruptGsiv;
+  UINT32             PerformanceInterruptGsiv;
/** The CPU Parked address field as described by
        the GICC structure in the ACPI Specification.
    */
-  UINT64    ParkedAddress;
+  UINT64             ParkedAddress;
/** The base address for the GIC CPU Interface
        as described by the GICC structure in the
        ACPI Specification.
    */
-  UINT64    PhysicalBaseAddress;
+  UINT64             PhysicalBaseAddress;
/** The base address for GICV interface
        as described by the GICC structure in the
        ACPI Specification.
    */
-  UINT64    GICV;
+  UINT64             GICV;
/** The base address for GICH interface
        as described by the GICC structure in the
        ACPI Specification.
    */
-  UINT64    GICH;
+  UINT64             GICH;
/** The GICV maintenance interrupt
        as described by the GICC structure in the
        ACPI Specification.
    */
-  UINT32    VGICMaintenanceInterrupt;
+  UINT32             VGICMaintenanceInterrupt;
/** The base address for GICR interface
        as described by the GICC structure in the
        ACPI Specification.
    */
-  UINT64    GICRBaseAddress;
+  UINT64             GICRBaseAddress;
/** The MPIDR for the CPU
        as described by the GICC structure in the
        ACPI Specification.
    */
-  UINT64    MPIDR;
+  UINT64             MPIDR;
/** The Processor Power Efficiency class
        as described by the GICC structure in the
        ACPI Specification.
    */
-  UINT8     ProcessorPowerEfficiencyClass;
+  UINT8              ProcessorPowerEfficiencyClass;
/** Statistical Profiling Extension buffer overflow GSIV. Zero if
        unsupported by this processor. This field was introduced in
        ACPI 6.3 (MADT revision 5) and is therefore ignored when
        generating MADT revision 4 or lower.
    */
-  UINT16    SpeOverflowInterrupt;
+  UINT16             SpeOverflowInterrupt;
/** The proximity domain to which the logical processor belongs.
        This field is used to populate the GICC affinity structure
        in the SRAT table.
    */
-  UINT32    ProximityDomain;
+  UINT32             ProximityDomain;
/** The clock domain to which the logical processor belongs.
        This field is used to populate the GICC affinity structure
        in the SRAT table.
    */
-  UINT32    ClockDomain;
+  UINT32             ClockDomain;
/** The GICC Affinity flags field as described by the GICC Affinity structure
        in the SRAT table.
    */
-  UINT32    AffinityFlags;
+  UINT32             AffinityFlags;
+
+  /** Optional field: Reference Token for the Cpc info of this processor.
+      Token identifying a CM_ARM_OBJ_REF structure, itself referencing
+      CM_ARM_CPC_INFO objects.
+  */
+  CM_OBJECT_TOKEN    CpcToken;

This field should be added to the GicC CmObjectParser.

  } CM_ARM_GICC_INFO;
/** A structure that describes the


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