v2:
- Added maintainer to all patch in this series [Sunil]
- Implement addition memory allocation strategy, where dma buffer
is force to allocation below 4GB (Please refer to pathc 0005)
[Sunil]
v1:
This patch series involves the following changes:
1. Remove DMA enable in CTRL register
2. Added DMA polling handling for RX/TX
3. Integrate SD MMC handling into the driver
Cc: Sunil V L <suni...@ventanamicro.com>
Cc: Leif Lindholm <quic_llind...@quicinc.com>
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Cc: Li Yong <yong...@intel.com>
John Chew (1):
DesignWare/DwEmmcDxe: Force DMA buffer to allocate below 4GB
mindachen1987 (4):
DesignWare/DwEmmcDxe: Enabled Internal IDMAC interrupt RX/TX register
DesignWare/DwEmmcDxe: Add CPU little endian option
DesignWare/DwEmmcDxe: Remove ARM dependency library
DesignWare/DwEmmcDxe: Add handling for SDMMC
Silicon/Synopsys/DesignWare/DesignWare.dec
| 3 +
Silicon/Synopsys/DesignWare/DesignWare.dsc
| 1 +
Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h
| 70 +++--
Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c
| 315 +++++++++++++++-----
Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf
| 3 +-
Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/{DwEmmcDxe.inf =>
DwSdmmcDxe.inf} | 11 +-
6 files changed, 283 insertions(+), 120 deletions(-)
copy Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/{DwEmmcDxe.inf =>
DwSdmmcDxe.inf} (74%)
--
2.34.1
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