--- Felix Kühling <[EMAIL PROTECTED]> wrote:
3. Separate commands and dataPerhaps, we can save some experimenting time. Tim, do you remember off
Right now commands and data are submitted to the chip as one data stream, either via the BCI or via DMA buffers. For easier security checking command and data streams should be separated. Savage chips can handle vertex buffers and indexed drawing commands. I couldn't find a way to specify the vertex format for indexed drawing commands. Either it is automagically deduced from various state bits (specular and enabled texture units come to mind) or vertices vertex buffers are always complete. This would also mean that their format differs between Savage3D and Savage4 since the Savage3D has only one texture unit. These are things that I'dd have to find out by experiment. But maybe someone happens to know it or has better documentation than I do.
hand which of these modes we can use with savage4/3d/etc?
I'm sorry, I've parsed this twice and I'm still not I sure I understand what question is being asked.
My spec for the Savage3D is complete. However, they actually removed the 3D section from both of the Savage4 register specs they sent me, so it is somewhat difficult for me to do comparisons. If you can ask a more specific question, I'd be happy to help.
Note, however, that it is hardly worth the trouble to spend time on the Savage3D. There were so many problems in the 2D engine that, by the time it became stable, the much improved Savage4 was available. Few of the Savage3Ds ever saw the light of day.
-- - Tim Roberts, [EMAIL PROTECTED] Providenza & Boekelheide, Inc.
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