Hi, I test unified RAM configuration and it works for me with some modifications. -. Replace SRAM by RAM hal_cortexm_kinetis_twr_k60n512.cdl to disable execution of SWI in hal_reset_vsr (line 187). Execution of this part reset tower and flash code runs again.
-. Lookup /dev/ser3 and make cyg_io_write instead of printf. Code with printf reset tower and flash code runs again. I also try to use cortexm exception support but it fails. I install an exception handler with cyg_exception_set_handler for CYGNUM_HAL_VECTOR_SERVICE (vector 11 -> SVCall). I make a SWI call an I expect it to modify execution flow to call my exception handler. SWI calls hal_default_svc_vsr and R3 get a dummy value not a function address value. Why software interrupt doesn't call hal_default_exception_vsr? Regards. ---------------------------------------- > Date: Thu, 5 May 2011 00:36:00 +0200 > From: ili...@siva.com.mk > To: ecos-discuss@ecos.sourceware.org > Subject: Re: [ECOS] Kinetis TWR-K60N512-KIT questions > > On 04.05.2011 12:46, jjp jjp wrote: > > Hi, > > It works with ecos toolchain and gcc-4.6 with -mcpu=cortex-m4! > > Great job Ilija. > > Thanks for good words. > I am testing some integer DFT code with gcc-4.6 / Cortex-M4. Shows > performance improvement over M3 code even for plain C code. > > > My miktake was to put optimization flag to -O0 in global flags. > > I will test your RAM configuration and give you feedbacks. > > I appreciate. > > Regards > Ilija > > > -- > Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos > and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss > -- Before posting, please read the FAQ: http://ecos.sourceware.org/fom/ecos and search the list archive: http://ecos.sourceware.org/ml/ecos-discuss
