In the next patch we're going to specify Extended Addresses of register
blocks in Generic Address Structure format. The GAS is easy to fill if we
want to posit either "unsupported" (all zero) or a given address in a
specific address space. However deriving "unsupported" just from a macro
expanding to zero is unwieldy, so let's avoid the need.

Contributed-under: TianoCore Contribution Agreement 1.0

Signed-off-by: Laszlo Ersek <[email protected]>
---
 OvmfPkg/AcpiTables/Platform.h |    3 ---
 OvmfPkg/AcpiTables/Facp.aslc  |    6 +++---
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/OvmfPkg/AcpiTables/Platform.h b/OvmfPkg/AcpiTables/Platform.h
index 3f0269b..547a5a3 100644
--- a/OvmfPkg/AcpiTables/Platform.h
+++ b/OvmfPkg/AcpiTables/Platform.h
@@ -38,13 +38,10 @@
 #define PM1a_CNT_BLK    0x0000b004
 #define PM_TMR_BLK      0x0000b008
 #define GPE0_BLK        0x0000afe0
-#define GPE1_BLK        0x00000000
 #define PM1_EVT_LEN     0x04
 #define PM1_CNT_LEN     0x02
 #define PM_TM_LEN       0x04
 #define GPE0_BLK_LEN    0x04
-#define GPE1_BLK_LEN    0x00
-#define GPE1_BASE       0x00
 #define RESERVED        0x00
 #define P_LVL2_LAT      0x0065
 #define P_LVL3_LAT      0x03E9
diff --git a/OvmfPkg/AcpiTables/Facp.aslc b/OvmfPkg/AcpiTables/Facp.aslc
index 3f09f92..2aec355 100644
--- a/OvmfPkg/AcpiTables/Facp.aslc
+++ b/OvmfPkg/AcpiTables/Facp.aslc
@@ -44,14 +44,14 @@ EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = {
   0,                // Power Mgt 2  Ctrl Reg Blk unsupported
   PM_TMR_BLK,       // Port address of Power Mgt Timer Ctrl Reg Blk
   GPE0_BLK,         // Port addr of General Purpose Event 0 Reg Blk
-  GPE1_BLK,         // Port addr of General Purpose Event 1 Reg Blk
+  0,                // General Purpose Event 1 Reg Blk unsupported
   PM1_EVT_LEN,      // Byte Length of ports at pm1X_evt_blk
   PM1_CNT_LEN,      // Byte Length of ports at pm1X_cnt_blk
   0,                // Power Mgt 2 Ctrl Reg Blk unsupported
   PM_TM_LEN,        // Byte Length of ports at pm_tm_blk
   GPE0_BLK_LEN,     // Byte Length of ports at gpe0_blk
-  GPE1_BLK_LEN,     // Byte Length of ports at gpe1_blk
-  GPE1_BASE,        // offset in gpe model where gpe1 events start
+  0,                // General Purpose Event 1 Reg Blk unsupported
+  0,                // General Purpose Event 1 Reg Blk unsupported
   0,                // _CST support
   P_LVL2_LAT,       // worst case HW latency to enter/exit C2 state
   P_LVL3_LAT,       // worst case HW latency to enter/exit C3 state
-- 
1.7.1



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