I think that'll only complicate things. I think the compiler should be
able to do anything, down to lowest level. Just like you have CLI, HLT,
FXSTOR, WRMSR, etc instruction support in x86
Hans-Peter Diettrich skrev:
Geoffrey Barton schrieb:
It now recognises the mnemonic 'cpsie' but not the following 'i'.
The 'msr' instruction should also allow the interrupts to be
enabled/disabled as
msr primask,r0
but msr gives an unknown identifier error for 'primask' and all the
other 'special' register names ('apsr' etc.) Perhaps they have been
given different names, but I cannot find them listed anywhere in the
FPC source.
I don't know details about this CPU, but possibly priviledged
operations (and registers) are not part of the CPU definition, because
these cannot be used in ordinary applications.
It may be a good idea to create multiple code generators, for machines
that can be used either for non-priviledged (application) or
privileged (system, driver...) coding. At least a priviledge level
should be passed to the compiler and assembler, so that it can flag
the need for privileged instructions in the given source code.
Dodi
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