[PATCH, AArch64, v3 1/6] aarch64: Extend %R for integer registers

[Richard Henderson]

From: Richard Henderson <r...@twiddle.net>

        * config/aarch64/aarch64.c (aarch64_print_operand): Allow integer
        registers with %R.
---
 gcc/config/aarch64/aarch64.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index b44ee40115d..930f27d9bac 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -7102,7 +7102,7 @@ sizetochar (int size)
      'S/T/U/V':                Print a FP/SIMD register name for a register 
list.
                        The register printed is the FP/SIMD register name
                        of X + 0/1/2/3 for S/T/U/V.
-     'R':              Print a scalar FP/SIMD register name + 1.
+     'R':              Print a scalar Integer/FP/SIMD register name + 1.
      'X':              Print bottom 16 bits of integer constant in hex.
      'w/x':            Print a general register name or the zero register
                        (32-bit or 64-bit).
@@ -7294,12 +7294,13 @@ aarch64_print_operand (FILE *f, rtx x, int code)
       break;
 
     case 'R':
-      if (!REG_P (x) || !FP_REGNUM_P (REGNO (x)))
-       {
-         output_operand_lossage ("incompatible floating point / vector 
register operand for '%%%c'", code);
-         return;
-       }
-      asm_fprintf (f, "q%d", REGNO (x) - V0_REGNUM + 1);
+      if (REG_P (x) && FP_REGNUM_P (REGNO (x)))
+       asm_fprintf (f, "q%d", REGNO (x) - V0_REGNUM + 1);
+      else if (REG_P (x) && GP_REGNUM_P (REGNO (x)))
+       asm_fprintf (f, "x%d", REGNO (x) - R0_REGNUM + 1);
+      else
+       output_operand_lossage ("incompatible register operand for '%%%c'",
+                               code);
       break;
 
     case 'X':
-- 
2.17.2