diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 37a92f5..ecf164c 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -18831,6 +18831,40 @@
     emit_move_insn (operands[0], operands[1]);
 })
 
+;; This peephole is convert instructions 
+;;     addq    $1, %rax
+;;     salq    $4, %rax
+;;     movl    (%rdi,%rax), %eax
+;;  into:
+;;     salq    $4, %rax
+;;     movl    16(%rdi,%rax), %eax
+
+(define_peephole2
+  [(parallel [(set (match_operand:DI 0 "register_operand")
+                   (plus (match_dup 0)
+                       (match_operand:DI 1 "const_int_operand")))
+                   (clobber (reg:CC FLAGS_REG))])
+   (parallel [(set (match_dup 0)
+                   (ashift:DI (match_dup 0)
+                           (match_operand 2 "const_int_operand")))
+                   (clobber (reg:CC FLAGS_REG))])
+  (set (match_operand:SI 4 "register_operand")
+        (mem:SI (plus:DI (match_operand:DI 3 "register_operand")
+					(match_dup 0))))]
+   "IN_RANGE (INTVAL (operands[2]), 3, 5) &&
+  (TARGET_64BIT && GET_MODE (operands[0]) == DImode
+    && GET_MODE (operands[3]) == DImode)"
+  [(parallel [(set (match_dup 0)
+                   (ashift:DI (match_dup 0)(match_dup 2)))
+                   (clobber (reg:CC FLAGS_REG))])
+   (set (match_dup 4)
+      (mem:SI (plus (match_dup 5) 
+                    (match_dup 0))))]
+{
+ int scale = 8 << INTVAL (operands[1]);
+ operands[5] = gen_rtx_PLUS (DImode,operands[3], GEN_INT (scale));
+})
+
 ;; After splitting up read-modify operations, array accesses with memory
 ;; operands might end up in form:
 ;;  sall    $2, %eax