On 11/26/2011 01:58 PM, Eric Botcazou wrote: >> The first four patches simply do the conversion, a piece at a time, >> assuming the RMO for all cpus. > > The new form of the membar_v8 insn looks a bit strange since operand 1 is > disregarded. If this is as intended, a comment would be in order.
Yeah, that's intended, as the fallback after we've matched the other two cases we can handle separately for TSO on v8. > "memory model" is used consistently in the manual so, if the triple m is > deemed > too disturbing, -mmemory-model would be a little better. In any case, I > don't > expect it to be used at all in practice. And memory_order should be renamed > into sparc_memory_model (or sparc_memmodel?) and the enum constants prefixed > with MM (which is the name of the PSTATE register holding the value). Ok. > This builds fine on Solaris, 32-bit and 64-bit, but I guess I'm seeing the > ICE > Dave reported. Do you have a patchlet for it? Try top-of-branch git://repo.or.cz/gcc/rth.git rth/atomic/sparc That's the last iteration I went through with Dave. r~