From 5ee7e5736f135aa5a7022ecf3668480c9d815c47 Mon Sep 17 00:00:00 2001
From: liuhongt <hongtao.liu@intel.com>
Date: Sat, 23 May 2020 15:30:58 +0800
Subject: [PATCH] Add missing expander for vector float_extend and
 float_truncate.

2020-05-23  Hongtao Liu  <hongtao.liu@intel.com>

gcc/ChangeLog
	PR target/95125
	* config/i386/sse.md (sf2dfmode_lower): New mode attribute.
	(trunc<mode><sf2dfmode_lower>2) New expander.
	(extend<sf2dfmode_lower><mode>2): Ditto.

gcc/testsuite/ChangeLog
	* gcc.target/i386/pr95125-avx.c: New test.
	* gcc.target/i386/pr95125-avx512f.c: Ditto.
---
 gcc/config/i386/sse.md                        | 14 +++++++
 gcc/testsuite/gcc.target/i386/pr95125-avx.c   | 27 ++++++++++++++
 .../gcc.target/i386/pr95125-avx512f.c         | 37 +++++++++++++++++++
 3 files changed, 78 insertions(+)
 create mode 100644 gcc/testsuite/gcc.target/i386/pr95125-avx.c
 create mode 100644 gcc/testsuite/gcc.target/i386/pr95125-avx512f.c

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 5071fb2895a..55526c58f63 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -6552,6 +6552,20 @@
 ;; For <sse2_avx_avx512f>_cvtps2pd<avxsizesuffix> insn pattern
 (define_mode_attr sf2dfmode
   [(V8DF "V8SF") (V4DF "V4SF")])
+(define_mode_attr sf2dfmode_lower
+  [(V8DF "v8sf") (V4DF "v4sf")])
+
+(define_expand "trunc<mode><sf2dfmode_lower>2"
+  [(set (match_operand:<sf2dfmode> 0 "register_operand")
+	(float_truncate:<sf2dfmode>
+	  (match_operand:VF2_512_256 1 "vector_operand")))]
+  "TARGET_AVX")
+
+(define_expand "extend<sf2dfmode_lower><mode>2"
+  [(set (match_operand:VF2_512_256 0 "register_operand")
+	(float_extend:VF2_512_256
+	  (match_operand:<sf2dfmode> 1 "vector_operand")))]
+  "TARGET_AVX")
 
 (define_insn "<sse2_avx_avx512f>_cvtps2pd<avxsizesuffix><mask_name><round_saeonly_name>"
   [(set (match_operand:VF2_512_256 0 "register_operand" "=v")
diff --git a/gcc/testsuite/gcc.target/i386/pr95125-avx.c b/gcc/testsuite/gcc.target/i386/pr95125-avx.c
new file mode 100644
index 00000000000..3cd1a08e5ed
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr95125-avx.c
@@ -0,0 +1,27 @@
+/* PR target/92125 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -mavx" } */
+
+extern float f[4];
+extern double d[4];
+
+void
+float_truncate_256 (void)
+{
+  f[0] = d[0];
+  f[1] = d[1];
+  f[2] = d[2];
+  f[3] = d[3];
+}
+
+void
+float_extend_256 (void)
+{
+  d[0] = f[0];
+  d[1] = f[1];
+  d[2] = f[2];
+  d[3] = f[3];
+}
+
+/* { dg-final { scan-assembler-times "vcvtps2pd" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2ps" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr95125-avx512f.c b/gcc/testsuite/gcc.target/i386/pr95125-avx512f.c
new file mode 100644
index 00000000000..109278ccf21
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr95125-avx512f.c
@@ -0,0 +1,37 @@
+/* PR target/95125 */
+/* { dg-do compile } */
+/* { dg-options "-O2 -ftree-vectorize -mavx512f -mprefer-vector-width=512 " } */
+
+extern float f[8];
+extern double d[8];
+
+void
+float_truncate_512 (void)
+{
+  f[0] = d[0];
+  f[1] = d[1];
+  f[2] = d[2];
+  f[3] = d[3];
+  f[4] = d[4];
+  f[5] = d[5];
+  f[6] = d[6];
+  f[7] = d[7];
+}
+
+void
+float_extend_512 (void)
+{
+  d[0] = f[0];
+  d[1] = f[1];
+  d[2] = f[2];
+  d[3] = f[3];
+  d[4] = f[4];
+  d[5] = f[5];
+  d[6] = f[6];
+  d[7] = f[7];
+}
+
+
+
+/* { dg-final { scan-assembler-times "vcvtps2pd" 1 } } */
+/* { dg-final { scan-assembler-times "vcvtpd2ps" 1 } } */
-- 
2.25.1

