> On 13 Nov 2025, at 2:56 PM, Uros Bizjak <[email protected]> wrote: > > External email: Use caution opening links or attachments > > > On Thu, Nov 13, 2025 at 7:14 AM Soumya AR <[email protected]> wrote: >> >> AArch64: Add RTL pass to narrow 64-bit GP reg writes to 32-bit >> >> This patch adds a new AArch64 RTL pass that optimizes 64-bit >> general purpose register operations to use 32-bit W-registers when the >> upper 32 bits of the register are known to be zero. > > This pass would also benefit x86_64 (and possibly other targets, too). > On x86_64, it would save one byte for every narrowed instruction, > because REX prefix would be removed, e.g.: > > 48 83 c0 03 add $0x3,%rax > 83 c0 03 add $0x3,%eax > > Any chance to make this pass generic? >
Hi Uros, This would be hard to accomplish right now (particularly post Stage 1) but I do think the pass could be generalized in the future if someone is interested in pursuing it. Thanks, Soumya > Uros.
