Index: gcc/testsuite/gcc.target/mips/umips-branch-3.c
===================================================================
--- gcc/testsuite/gcc.target/mips/umips-branch-3.c	(revision 0)
+++ gcc/testsuite/gcc.target/mips/umips-branch-3.c	(revision 0)
@@ -0,0 +1,10 @@
+/* { dg-options "(-mmicromips)" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+
+void MICROMIPS
+foo (void)
+{
+  return;
+}
+
+/* { dg-final { scan-assembler "\tjrc\t\\\$31\n" } } */
Index: gcc/testsuite/gcc.target/mips/umips-branch-4.c
===================================================================
--- gcc/testsuite/gcc.target/mips/umips-branch-4.c	(revision 0)
+++ gcc/testsuite/gcc.target/mips/umips-branch-4.c	(revision 0)
@@ -0,0 +1,12 @@
+/* { dg-options "(-mmicromips)" } */
+
+void foo (void);
+
+int MICROMIPS
+a (void)
+{
+  foo ();
+  return 0;
+}
+
+/* { dg-final { scan-assembler "\tjals\tfoo\n\tnop" } } */
Index: gcc/config/mips/mips.md
===================================================================
--- gcc/config/mips/mips.md	(revision 206407)
+++ gcc/config/mips/mips.md	(working copy)
@@ -1,5 +1,5 @@
 ;;  Mips.md	     Machine Description for MIPS based processors
-;;  Copyright (C) 1989-2014 Free Software Foundation, Inc.
+;;  Copyright (C) 1989-2013 Free Software Foundation, Inc.
 ;;  Contributed by   A. Lichnewsky, lich@inria.inria.fr
 ;;  Changes by       Michael Meissner, meissner@osf.org
 ;;  64-bit r4000 support by Ian Lance Taylor, ian@cygnus.com, and
@@ -6149,7 +6149,12 @@
 (define_insn "*<optab>"
   [(any_return)]
   ""
-  "%*j\t$31%/"
+  {
+    if (TARGET_MICROMIPS)
+      return "%*jr%:\t$31";
+    else
+      return "%*j\t$31%/";
+  }
   [(set_attr "type"	"jump")
    (set_attr "mode"	"none")])
 
Index: gcc/config/mips/mips.h
===================================================================
--- gcc/config/mips/mips.h	(revision 206407)
+++ gcc/config/mips/mips.h	(working copy)
@@ -2529,7 +2529,9 @@ typedef struct mips_args {
       : TARGET_MICROMIPS && !TARGET_INTERLINK_COMPRESSED	\
       ? "%*" INSN "r%!\t%" #TARGET_OPNO "%/"			\
       : "%*" INSN "r\t%" #TARGET_OPNO "%/")			\
-   : MIPS_ABSOLUTE_JUMP ("%*" INSN "\t%" #TARGET_OPNO "%/"))
+   : TARGET_MICROMIPS && !TARGET_INTERLINK_COMPRESSED		\
+     ? MIPS_ABSOLUTE_JUMP ("%*" INSN "%!\t%" #TARGET_OPNO "%/")	\
+     : MIPS_ABSOLUTE_JUMP ("%*" INSN "\t%" #TARGET_OPNO "%/"))	\
 
 /* Similar to MIPS_CALL, but this is for MICROMIPS "j" to generate
    "jrc" when nop is in the delay slot of "jr".  */