diff --git a/gcc/gimple-isel.cc b/gcc/gimple-isel.cc
index 048b407bd11..1f9a17105ea 100644
--- a/gcc/gimple-isel.cc
+++ b/gcc/gimple-isel.cc
@@ -184,6 +184,21 @@ gimple_expand_vec_cond_expr (gimple_stmt_iterator *gsi,
 
 	  tree op0_type = TREE_TYPE (op0);
 	  tree op0a_type = TREE_TYPE (op0a);
+
+	  /* For targets where result of comparison is all-ones or all-zeros,
+	     a < b ? -1 : 0 can be reduced to a < b.  */
+
+	  if (integer_minus_onep (op1)
+	      && integer_zerop (op2)
+	      && TYPE_MODE (TREE_TYPE (lhs)) == TYPE_MODE (TREE_TYPE (op0))
+	      && expand_vec_cmp_expr_p (op0a_type, op0_type, tcode))
+	    {
+	      tree conv_op = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (lhs), op0);
+	      gassign *new_stmt = gimple_build_assign (lhs, conv_op);
+	      gsi_replace (gsi, new_stmt, true);
+	      return new_stmt;
+	    }
+
 	  if (used_vec_cond_exprs >= 2
 	      && (get_vcond_mask_icode (mode, TYPE_MODE (op0_type))
 		  != CODE_FOR_nothing)
diff --git a/gcc/testsuite/gcc.target/arm/pr97872.c b/gcc/testsuite/gcc.target/arm/pr97872.c
new file mode 100644
index 00000000000..eeb4dd9d6bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr97872.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_neon_ok } */
+/* { dg-options "-O3" } */
+/* { dg-add-options arm_neon } */
+
+#include <arm_neon.h>
+
+uint8x8_t f1(int8x8_t a, int8x8_t b) {
+  return a < b;
+}
+
+/* { dg-final { scan-assembler-not "vbsl" } } */