Hi, On Sat, 2006-07-22 at 10:39 -0700, User Tomdean wrote: > How do I cause 'gnetlist -g verilog' to pick up the pinlabel rather > than the pin number for the module port name?
At the moment, no. The backend uses the pinnumber information as passed directly from the gnetlist core. When I wrote the backend I had physical simulation in mind. Whatever appeared in the pin number attribute was used ad the module port name. I don't remember if at the time I could get by-pin attributes from gnetlist. If you want to do something else, make sure that it's configurable and does not break the current way of doing things. From the drc2 backend it looks like gnetlist:get-attribute-by-pinnumber can fetch other attributes to use. Using pinlabel attribute would be closer to what the Cadence tool does. It should not be too hard to use this but you will have to replace the call to gnetlist:get-pins-nets in the Verilog back-end with your own custom one that calls gnetlist:get-attributes-by-pinnumber internally after getting the pin names with gnetlist:get-pins-nets, and then returns your own list to the rest of the code. >From your next post, it sounds like you are attempting this already? > > Is there a doc that describes the flow in gnetlist? > > tomdean > > > _______________________________________________ > geda-user mailing list > geda-user@moria.seul.org > http://www.seul.org/cgi-bin/mailman/listinfo/geda-user -- -------------------------------------------------- Mike Jarabek FPGA/ASIC Designer http://www.istop.com/~mjarabek -------------------------------------------------- _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user