> And I'd argue that even that isn't enough to qualify as a thorough > verification. I might do a proto board without silk or soldermask and > everything looks good except that the silk and soldermask for the > footprint is messed up. Or I might be able to hand solder it but not > have it be reliable or able to be reliably assembled in a factory > environment.
So far, we've been going with the "vetted" flag, which just means "I've used this footprint in a board that worked". > I'm not saying we shouldn't do what we can because every little bit > helps. I'm just saying there are many different levels of verification :) Yeah. > But on the instantiating each one bit, I've verified that at least there > are no m4 syntax errors (there used to be). I have most of whats needed > in place to automatically instantiate all footprints. In fact, we could > probably use some of the gedasymbols.org scripts to have pcb try to load > every single footprint and spit out a list of any which may have pcb > syntax errors in them. Well, just pcb built with the batch hid should be enough. _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user