On Sat, Jun 6, 2009 at 6:37 PM, Jorge Juan wrote: > > Hi, > I teach a basic digital circuit design curse at the university for > first-year students. I plan to incorporate HDL, behavioral > descriptions, simulation and logic optimization next year. > I find Icarus Verilog plus gtkwave and the rest of GEDA tools ideal > for the task, but cant find a way to do logic optimization within the > geda framework. The icarus 0.8.x README tells logic optimization can > be enabled through the "-F" option, but it is not documented in the > man page. Logic synthesis to edif works fine but optimization is not > applied. > Some simple optimization targeting basic logic (AND, OR, NOT) would be > ideal for me. Integration in Icarus would be perfect. > Do you know of available options within geda or free software. > Thanks.
Hello Jorge, There is espresso-ab. Actually it is also said that Synopsys and Cadence have some tools based from espresso. http://code.google.com/p/eqntott/ cheers, Chitlesh -- http://chitlesh.fedorapeople.org/FEL _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user