DJ Delorie wrote: > IMHO the smallest drills are vias, and bigger drills are pins. At > least, if you have an untended drill of size N, any tented drill of > size >N will give an error. I don't think there's any special "flags" > in PCB that are going to change this. >
Ok, glad to know I wasn't missing something. The tech guy said "there's only so much we can do with scripting", I beg to differ. ;-) I found the DRC tool in pcb, it highlighted the same errors the freedfm found, plus a couple of false hits because of my problem creating the ground plane, spelled out below. > If the keepout circle is for your own reference, you'll have to either > (1) remove or reduce it so that it doesn't go over the edge, or (2) > expand your work area and use an explicit outline layer (rename a > copper layer "outline"). PCB by default (i.e. without coding changes > or manual hacking the .pcb file) won't let you place silk outside the > work area. That you happen to have something too big to meet this > rule just means pcb acts strangely ;-) > Neat! I was contemplating changing my footprint so that I had two arcs instead of one circle. I'm tempted by the outline layer, especially since barebonespcb.com has a minimum size of 1250milx1250mil(mine is 1000x750), but I don't want the bleed over when I go to a panel layout. So, two arcs it is then. > And lastly, source control.... yeah, we took care in the pcb load/save > file to preserve the relative ordering of things so that diffs from > board to board due to edits were minimal. > The only hot mess I created where the diff didn't make sense was when I flooded the copper ground plane on my solder side (two layer board). Is there a way, after a trace has been placed, to mark it so a polygon fill will avoid it like a via? I had to create 30 or so polygons to create my ground plane, manually avoiding my two traces. I felt like I wasn't doing it right. which is usually a sign that I missed something. :-) I read in one of the tutorials somewhere that I could flag the trace _before_ placing it, but that didn't help me by the time I'd discovered the problem. I'd prefer not to redo the entire back side if I don't have to. Especially since every time I delete a trace, I can't seem to create a new trace in it's place. pcb won't let me terminate it in the same place the old trace terminated. Yup, I'm missing something, again. thx, Jason. _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user