On Tue, 2009-10-20 at 12:32 -0400, DJ Delorie wrote: > > The difficulty is that the layer stack is something which is quite > > hard to define. > > The paradigm we're going with is that the layer stack is defined from > the "component"-tagged layer group to the "solder"-tagged layer group. > If those aren't the outer two groups, much hilarity ensues.
Yes.. I noticed ;) Perhaps some heuristic to suggest how the user "fixes" their stack-up would be possible (once support for saving layer colours in the PCB file is present). The problem is not over with ordering of layers though. There is also the need to define the thickness of each piece. Special layers, like "outline" which might appear in the "stack" need to be ignored, or given a notional Z-coordinate too. Best wishes, Peter C. _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user