> User now needs to somehow specify that U01 GND is connected to > analog ground, U01 V+ and V- to analog power rails. U01 GND, U02 > GND, U03 GND and U04 GND are connected to digital ground. U02 VCC is > connected to 5V, U03 VCC3v3 is connected to 3v3 power, and U04 > VCC1v8 s connected to 1v8 power. So is this in some attribute table > or something?
I'm not exactly sure what's best here, but I know it doesn't belong in the *gate*. My idea is to have a table object that shows up in the schematic, like in a corner or something, that lists all the power pins and what nets they connect to. I've seen other schematics with this, it seemed much cleaner than what we do. How we populate the table, who is responsible for it, how the user edits it - if it's even in the schematic at all - is TBD. Heck, you don't even know what the power pins *are* until you've selected a package, and that's way down the line flow-wise. As an aside, support for a table of pin mappings opens itself up to FPGA mappings, too - just supply a CSV instead of trying to map it to a schematic. _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user