I'm a little surprised that Icarus Verilog doesn't already pay attention to the "4" in your "%4b". In any case, this should do the trick for you:
integer result; ... $display("%b", result[3:0]); ... or failing that, you can try: wire [3:0] tmp = result; ... $display("%b", tmp); Patrick Doyle wrote: > Sorry to pester you folks with this, but I'm not sure whom else to ask. > > I have some verilog test code in which I would like to display an > integer value, which is known to be between 0 and 15, as a binary > vector, i.e. > > integer result; > $display("%4b", result); > > of course I get a 64 bit vector displayed. > > Is there any way to cast my integer variable "result" as a 4 bit > vector just for use in a $display statement? > > Thanks for any tips you can give me. > > --wpd > > > _______________________________________________ > geda-user mailing list > geda-user-3olirty5fqqavzljymc...@public.gmane.org > http://www.seul.org/cgi-bin/mailman/listinfo/geda-user > -- Steve Williams "The woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep." _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user