Kyle Roarty has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/42443 )
Change subject: arch-x86: Add insts used in newer libstdc++ rehashing
......................................................................
arch-x86: Add insts used in newer libstdc++ rehashing
For newer versions of libstdc++ (Like the one in the
ubuntu-20.04_all-dependencies docker image), the variables used when
rehashing, e.g., std::unordered_maps have been extended. This resulted
in the rehashing function using different, unimplemented, instructions.
Because these instructions are unimplemented, it resulted in a
std::bad_alloc exception when inserting into an unordered_map
This patchset implements the following instructions:
FCOMI, a floating point comparison instruction, using the compfp
microop. The implementation mirrors that of the FUCOMI instruction
(another floating point comparison instruction)
FSUBRP, a reverse subtraction instruction, is implemented using the
subfp microop like the FSUBP does, but with the operands flipped
accordingly.
FISTP, an instruction to convert a float to int and then store, is
implemented by using a conversion microop (cvtf_d2i) and then a store.
The cvtf_d2i microop is re-written to handle multple data sizes, as is
required by the FISTP instruction.
Change-Id: I85c57acace1f7a547b0a97ec3a0f0500909c5d2a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42443
Reviewed-by: Gabe Black <gabe.bl...@gmail.com>
Maintainer: Gabe Black <gabe.bl...@gmail.com>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/arch/x86/insts/microfpop.hh
M src/arch/x86/isa/decoder/x87.isa
M src/arch/x86/isa/insts/x87/arithmetic/subtraction.py
M
src/arch/x86/isa/insts/x87/compare_and_test/floating_point_ordered_compare.py
M
src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py
M src/arch/x86/isa/microops/fpop.isa
6 files changed, 37 insertions(+), 13 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/x86/insts/microfpop.hh
b/src/arch/x86/insts/microfpop.hh
index e9d32da..245a899 100644
--- a/src/arch/x86/insts/microfpop.hh
+++ b/src/arch/x86/insts/microfpop.hh
@@ -54,6 +54,7 @@
const RegIndex dest;
const uint8_t dataSize;
const int8_t spm;
+ RegIndex foldOBit;
// Constructor
FpOp(ExtMachInst _machInst,
@@ -66,7 +67,9 @@
__opClass),
src1(_src1.index()), src2(_src2.index()), dest(_dest.index()),
dataSize(_dataSize), spm(_spm)
- {}
+ {
+ foldOBit = (dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
+ }
std::string generateDisassembly(
Addr pc, const Loader::SymbolTable *symtab) const override;
diff --git a/src/arch/x86/isa/decoder/x87.isa
b/src/arch/x86/isa/decoder/x87.isa
index 258fcb5..e7f1747 100644
--- a/src/arch/x86/isa/decoder/x87.isa
+++ b/src/arch/x86/isa/decoder/x87.isa
@@ -185,7 +185,7 @@
}
0x3: decode MODRM_MOD {
0x3: fcmovnu();
- default: fistp();
+ default: Inst::FISTP(Md);
}
0x4: decode MODRM_MOD {
0x3: decode MODRM_RM {
@@ -203,7 +203,7 @@
default: Inst::FLD80(M);
}
0x6: decode MODRM_MOD {
- 0x3: fcomi();
+ 0x3: Inst::FCOMI(Rq);
default: Inst::UD2();
}
0x7: decode MODRM_MOD {
@@ -307,7 +307,7 @@
default: ficomp();
}
0x4: decode MODRM_MOD {
- 0x3: fsubrp();
+ 0x3: Inst::FSUBRP(Rq);
default: fisub();
}
0x5: decode MODRM_MOD {
@@ -344,7 +344,7 @@
}
0x3: decode MODRM_MOD {
0x3: Inst::UD2();
- default: fistp();
+ default: Inst::FISTP(Mw);
}
0x4: decode MODRM_MOD {
0x3: decode MODRM_RM {
@@ -365,7 +365,7 @@
}
0x7: decode MODRM_MOD {
0x3: Inst::UD2();
- default: fistp();
+ default: Inst::FISTP(Mq);
}
}
}
diff --git a/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py
b/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py
index 02c41f6..dea1277 100644
--- a/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py
+++ b/src/arch/x86/isa/insts/x87/arithmetic/subtraction.py
@@ -91,8 +91,12 @@
fault "std::make_shared<UnimpInstFault>()"
};
+def macroop FSUBRP_R
+{
+ subfp sti, st(0), sti, spm=1
+};
+
# FISUB
# FSUBR
-# FSUBRP
# FISUBR
'''
diff --git
a/src/arch/x86/isa/insts/x87/compare_and_test/floating_point_ordered_compare.py
b/src/arch/x86/isa/insts/x87/compare_and_test/floating_point_ordered_compare.py
index 5e03952..cd348cd 100644
---
a/src/arch/x86/isa/insts/x87/compare_and_test/floating_point_ordered_compare.py
+++
b/src/arch/x86/isa/insts/x87/compare_and_test/floating_point_ordered_compare.py
@@ -37,6 +37,11 @@
# FCOM
# FCOMP
# FCOMPP
-# FCOMI
# FCOMIP
+
+def macroop FCOMI_R
+{
+ compfp st(0), sti
+};
+
'''
diff --git
a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py
b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py
index 1dbe79f..e06a086 100644
---
a/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py
+++
b/src/arch/x86/isa/insts/x87/data_transfer_and_conversion/convert_and_load_or_store_integer.py
@@ -50,6 +50,21 @@
};
# FIST
-# FISTP
+
+def macroop FISTP_M
+{
+ cvtf_d2i t1, st(0)
+ st t1, seg, sib, disp
+ pop87
+};
+
+def macroop FISTP_P
+{
+ rdip t7
+ cvtf_d2i t1, st(0)
+ st t1, seg, riprel, disp
+ pop87
+};
+
# FISTTP
'''
diff --git a/src/arch/x86/isa/microops/fpop.isa
b/src/arch/x86/isa/microops/fpop.isa
index 346f0d6..f6bc440 100644
--- a/src/arch/x86/isa/microops/fpop.isa
+++ b/src/arch/x86/isa/microops/fpop.isa
@@ -322,10 +322,7 @@
class cvtf_d2i(ConvOp):
code = '''
int64_t intSrcReg1 = static_cast<int64_t>(FpSrcReg1);
- if (REX_W)
- SDestReg = intSrcReg1;
- else
- SDestReg = merge(SDestReg, intSrcReg1, 4);
+ DestReg = merge(DestReg, intSrcReg1, dataSize);
'''
# Convert two integers registers representing an 80-bit floating
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I85c57acace1f7a547b0a97ec3a0f0500909c5d2a
Gerrit-Change-Number: 42443
Gerrit-PatchSet: 5
Gerrit-Owner: Kyle Roarty <kyleroarty1...@gmail.com>
Gerrit-Reviewer: Alex Dutu <alexandru.d...@amd.com>
Gerrit-Reviewer: Gabe Black <gabe.bl...@gmail.com>
Gerrit-Reviewer: Kyle Roarty <kyleroarty1...@gmail.com>
Gerrit-Reviewer: Matthew Poremba <matthew.pore...@amd.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-CC: Matt Sinclair <mattdsincl...@gmail.com>
Gerrit-MessageType: merged
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