diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -24,7 +24,8 @@ def makeLinuxAlphaSystem(mem_mode, mdesc
     self.iobus = Bus(bus_id=0)
     self.membus = Bus(bus_id=1)
     self.bridge = Bridge(delay='50ns', nack_delay='4ns')
-    self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()))
+    self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem()),
+                                 latency='10ns', latency_var='2ns')
     self.bridge.side_a = self.iobus.port
     self.bridge.side_b = self.membus.port
     self.physmem.port = self.membus.port
diff --git a/src/mem/PhysicalMemory.py b/src/mem/PhysicalMemory.py
--- a/src/mem/PhysicalMemory.py
+++ b/src/mem/PhysicalMemory.py
@@ -8,6 +8,7 @@ class PhysicalMemory(MemObject):
     range = Param.AddrRange(AddrRange('128MB'), "Device Address")
     file = Param.String('', "memory mapped file")
     latency = Param.Latency('1t', "latency of an access")
+    latency_var = Param.Latency('0ns', "access variablity")
     zero = Param.Bool(False, "zero initialize memory")
 
 class DRAMMemory(PhysicalMemory):
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -41,6 +41,7 @@
 
 #include "arch/isa_traits.hh"
 #include "base/misc.hh"
+#include "base/random.hh"
 #include "config/full_system.hh"
 #include "mem/packet_access.hh"
 #include "mem/physical.hh"
@@ -51,7 +52,8 @@ using namespace TheISA;
 using namespace TheISA;
 
 PhysicalMemory::PhysicalMemory(const Params *p)
-    : MemObject(p), pmemAddr(NULL), lat(p->latency)
+    : MemObject(p), pmemAddr(NULL), lat(p->latency),
+      lat_var(p->latency_var)
 {
     if (params()->range.size() % TheISA::PageBytes != 0)
         panic("Memory Size not divisible by page size\n");
@@ -116,7 +118,10 @@ Tick
 Tick
 PhysicalMemory::calculateLatency(PacketPtr pkt)
 {
-    return lat;
+    Tick latency = lat;
+    if (lat_var != 0)
+        latency += random_mt.random<Tick>(0, lat_var);
+    return latency;
 }
 
 
diff --git a/src/mem/physical.hh b/src/mem/physical.hh
--- a/src/mem/physical.hh
+++ b/src/mem/physical.hh
@@ -146,6 +146,7 @@ class PhysicalMemory : public MemObject
     uint8_t *pmemAddr;
     int pagePtr;
     Tick lat;
+    Tick lat_var;
     std::vector<MemoryPort*> ports;
     typedef std::vector<MemoryPort*>::iterator PortIterator;